Semiconductor device manufacturing: process – Chemical etching – Combined with the removal of material by nonchemical means
Reexamination Certificate
2002-07-25
2003-05-20
Goudreau, G (Department: 1763)
Semiconductor device manufacturing: process
Chemical etching
Combined with the removal of material by nonchemical means
C438S690000, C438S691000, C438S693000, C438S747000, C216S088000, C216S089000, C216S090000, C216S091000, C216S092000
Reexamination Certificate
active
06566268
ABSTRACT:
TECHNICAL FIELD OF THE INVENTION
The present invention relates generally to a method and apparatus for planarizing a semiconductor wafer, and more particularly to a method and apparatus for planarizing a surface of a semiconductor wafer by eroding a portion of the surface of the semiconductor wafer with a fluid.
BACKGROUND OF THE INVENTION
Semiconductor integrated circuits are typically fabricated by a layering process in which several layers of material are fabricated on or in a surface of a wafer, or alternatively, on a surface of a previous layer. This fabrication process typically requires subsequent layers to be fabricated upon a smooth, planar surface of a previous layer. However, the surface topography of layers may be uneven due to an uneven topography associated with an underlying layer. As a result, a layer may need to be planarized in order to present a smooth, planar surface for a subsequent processing step. For example, a layer may need to be planarized prior to the formation of a conductor layer or pattern on an outer surface of the layer.
In particular, a semiconductor wafer may be planarized to remove high topography features (i.e. elevated portions) which extend above the plane defined by the surface of the semiconductor wafer. The planarization process typically is accomplished with a system that includes a backing film or membrane which supports the semiconductor wafer during the planarization process. The planarization process also includes a polishing pad placed in contact with the semiconductor wafer. The polishing pad is moved relative to the semiconductor wafer thereby causing material to be removed from the surface of the semiconductor wafer. This planarization process is often referred to as mechanical planarization (MP) and is utilized to improve the quality and reliability of semiconductor devices. The above described planarization process may also involve the introduction of a chemical slurry to facilitate higher removal rates, along with the selective removal of materials fabricated on the semiconductor wafer. This planarization process is often referred to as chemical mechanical planarization or chemical mechanical polishing (CMP).
The above described processes (i.e. MP and CMP) effectively planarize semiconductor wafers, however these processes are relatively expensive to utilize. In particular, some of the components of each of these processes are consumed during planarization and therefore must be replaced. For example, the backing films or membranes which support the semiconductor wafer during the planarization process also wear out and must be replaced. In addition, the polishing pads utilized to planarize semiconductor wafers tend to wear out and thus must be periodically replaced. Polishing pads must also be treated with conditioners to be ready for use. The replacement of conditioners, pads, membranes, and other components increases the cost of manufacturing semiconductor wafers.
Furthermore, the machines used to perform MP and CMP tend to be mechanically complex and expensive. In addition, these machines are somewhat unreliable and expensive to maintain. These factors further increase the cost of manufacturing semiconductor wafers.
Thus, a continuing need exists for a method and an apparatus for planarizing a semiconductor wafer which is relatively inexpensive and reliable.
SUMMARY OF THE INVENTION
In accordance with a first embodiment of the present invention, there is provided an apparatus for planarizing a wafer surface of a semiconductor wafer having an elevated portion extending therefrom. The apparatus includes a fluid flow surface spaced apart from the wafer surface so that (i) a chamber is defined between the wafer surface and the fluid flow surface, and (ii) the elevated portion of the semiconductor wafer is positioned in the chamber. The apparatus also includes a flow generator for generating a flow of fluid which is advanced (i) through the chamber, and (ii) into contact with the elevated portion of the semiconductor wafer.
Pursuant to a second embodiment of the present invention, there is provided a method of planarizing a wafer surface of a semiconductor wafer having an elevated portion extending therefrom. The method includes the step of positioning a fluid flow surface relative to the wafer surface so that (i) a chamber is defined between the wafer surface and the fluid flow surface, and (ii) the elevated portion of the semiconductor wafer is positioned in the chamber. The method also includes the step of advancing a fluid (i) through the chamber, and (ii) into contact with the elevated portion of the semiconductor wafer.
Pursuant to a third embodiment of the present invention, there is provided a method of planarizing a wafer surface of a semiconductor wafer having an elevated portion extending therefrom. The method includes the step of positioning a fluid flow surface relative to the wafer surface so that (i) a space is defined between the wafer surface and the fluid flow surface, and (ii) the elevated portion of the semiconductor wafer is positioned in the space. The method also includes the step of advancing a fluid within the space so that the fluid contacts and erodes the elevated portion of the semiconductor wafer.
It is an object of the present invention to provide a new and useful apparatus and method for planarizing a surface of a semiconductor wafer having an elevated portion extending therefrom.
It is also an object of the present invention to provide an improved apparatus and method for planarizing a surface of a semiconductor wafer having an elevated portion extending therefrom.
It is yet another object of the present invention to provide an apparatus and method for planarizing a surface of a semiconductor wafer having an elevated portion extending therefrom which is relatively reliable.
It is moreover an object of the present invention to provide an apparatus and method for planarizing a surface of a semiconductor wafer having an elevated portion extending therefrom which is relatively inexpensive.
The above and other objects, features, and advantages of the present invention will become apparent from the following description and the attached drawings.
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Goudreau G
LSI Logic Corporation
Maginot, Moore & Bowman LLP
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