Method and apparatus for pipelined detection of overflow in resi

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36471501, 364713, G06F 752

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active

051074516

ABSTRACT:
A residue number system multiplication overflow detection processor generates either a VALID signal or an INVALID signal indicating whether multiplication overflow has occurred. Operands X and Y are received in residue representation and are multiplied in a multiplier. The X and Y operands are also converted to mixed base representation. The mixed base representations of the operands are compared in order to generate magnitude measures indicative of the magnitude of each of the operands. These magnitude measures and a mixed base representation of the product are used to generate the VALID and INVALID signals. The invention is particularly well-suited to be implemented using optical technologies.

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patent: 4864524 (1989-09-01), Guilfoyle et al.
N. S. Szabo, M. S. et al., "Residue Arithmetic and its Applications to Computer Technology", McGraw-Hill Book Company, pp. 12-105.
Taylor, F. J., "Risidue Arithmetic: A Tutorial with Examples", Computer, May 1984, pp. 50-62.

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