Computer graphics processing and selective visual display system – Computer graphics processing – Three-dimension
Reexamination Certificate
1998-10-23
2001-11-06
Nguyen, Phu K. (Department: 2772)
Computer graphics processing and selective visual display system
Computer graphics processing
Three-dimension
Reexamination Certificate
active
06313839
ABSTRACT:
TECHNICAL FIELD OF THE INVENTION
The present invention relates to computer graphics display systems and, more particularly, to a method and apparatus for performing Z buffer depth comparison operations in a computer graphics display system.
BACKGROUND OF THE INVENTION
Computer graphics display systems typically comprise a frame buffer memory which stores the color and Z coordinate associated with each pixel to be displayed on the monitor of the computer graphics display system. A frame buffer controller of the computer graphics display system controls the process of writing the Z coordinates and the colors of the pixels to the frame buffer memory. In many high-performance computer graphics display systems, Z buffer depth comparison tests are used to determine whether a new Z coordinate received in the frame buffer controller corresponds to a pixel that will be visible when displayed, or whether the pixel associated with the new Z coordinate will be occluded or hidden if displayed. If the pixel will be occluded, it is unnecessary to write the Z coordinate and the associated color to the frame buffer memory and the pixel can be discarded. On the other hand, if the pixel will be visible, the Z coordinate and the associated color must be written to the frame buffer memory.
In these types of systems, Z buffer depth comparison tests are performed by reading the old Z coordinate for the pixel from the Z buffer, comparing the old Z coordinate with the new Z coordinate, and, if the new Z coordinate passes the Z buffer depth comparison test, writing the new Z coordinate and the associated pixel color into the Z buffer and image buffer, respectively, of the frame buffer memory. Once these steps have been performed, the next pixel is processed in an identical manner.
Although this type of depth comparison test is needed to occlude hidden surfaces, performing depth comparison operations for each new Z coordinate received in the frame buffer controller requires significant memory bandwidth for reading the Z coordinates from the Z buffer.
Accordingly, a need exists for a method and apparatus for performing Z buffer depth comparison tests which reduce the number of reads to the frame buffer memory and thereby improve memory bandwidth efficiency.
SUMMARY OF THE INVENTION
The present invention provides a method and apparatus for performing Z depth comparison tests in a computer graphics display system. In accordance with the present invention, minimum and maximum Z values are calculated for each region of Z values stored in a Z buffer memory device. When a Z value to be tested is received, the Z value is tested against the maximum Z value to determine whether the primitive is occluded. The maximum Z value corresponds to the largest Z value of a region of Z values. The minimum Z value corresponds to the smallest Z value of all of the Z values of the region. If a determination is made that the primitive is not occluded, the received Z value is tested against the minimum Z value. If a determination is made that the received Z value is less than the minimum Z value, the received Z value is retained and is ultimately stored in the Z buffer memory element. The minimum and maximum Z values are updated using the Z values which are contained in the Z buffer memory element.
The apparatus of the present invention comprises a controller which receives the Z values to be tested and performs the depth comparison tests, and the Z buffer memory device, which is in communication with the controller. The Z buffer memory device stores the received Z values. The minimum and maximum Z values may be stored in the Z buffer memory device or in a separate Z limit buffer memory element in communication with the controller. Each primitive has Z values associated with each vertex of the primitive. Each received Z value is associated with a region of Z values in the Z buffer memory device.
The controller compares each Z value received in the controller with the maximum Z value for the corresponding region to determine whether the primitive associated with the received Z value is occluded. If a determination is made that the Z value is less than or equal to the maximum Z value for the region, the controller determines whether the received Z value is less than the minimum Z value for the region. If the controller determines that the received Z value is less than the minimum Z value for the region, the received Z value is output from the controller to the Z buffer memory device and is stored in the memory device. If a determination is made by the controller that the received Z value is less than the minimum Z value for the region, the minimum and maximum Z values for the region are updated using the received Z value.
If a determination is made by the controller that the received Z value is greater than or equal to the minimum Z value for the region, the controller reads an old Z value from the memory device and compares it to the received Z value, wherein if the received Z value is less than the old Z value, the received Z value is written by the controller to the memory element and the minimum and maximum Z values for the region corresponding to the received Z value are updated using the received Z value.
In accordance with the preferred embodiment of the present invention, the controller comprises a cache memory element for storing a region of Z values and the maximum and minimum Z values associated with the region. The values stored in the cache memory element are originally obtained from the Z buffer memory element. The minimum and maximum Z values may be obtained from the Z limit buffer memory element if they are initially stored therein. The controller compares each Z value received in the controller with the maximum Z value for the corresponding region stored in the cache memory device to determine whether the primitive associated with the received Z value is occluded.
If a determination is made that the Z value is less than or equal to the maximum Z value for the region, the controller determines whether the received Z value is less than the minimum Z value for the region stored in the cache memory element. If the controller determines that the received Z value is less than the minimum Z value for the region stored in the cache memory element, the controller stores the received Z value at a particular location in the cache memory element and tags the location with a tag indicating that location contains a valid Z value.
Preferably, prior to the controller comparing the received Z value with the maximum Z value for the corresponding region stored in the cache memory element, the controller determines whether the minimum and maximum Z values for the region associated with the received Z value are already contained in the cache memory element. If the minimum and maximum Z values are not contained in the cache memory element, the controller reads the minimum and maximum Z values from a Z limit buffer and stores them in the cache memory element. If a determination is made that the received Z value is greater than or equal to the minimum Z value for the region, the controller reads the old Z value from the Z buffer memory device and compares the old Z value with the received Z value.
If the controller determines that the received Z value is less than the old Z value read from the memory device, the received Z value is stored in a particular location in the cache memory element. The cache location is then tagged to indicate that it contains a valid Z value. When the cache memory element is flushed, only the Z values stored at the tagged locations in the cache memory element are written to the Z buffer memory device. After the cache memory device is flushed, the minimum and maximum Z values are updated.
Other features and advantages of the present invention will become apparent from the following discussion, drawings and claims.
REFERENCES:
patent: 4885703 (1989-12-01), Deering
patent: 4907174 (1990-03-01), Priem
Computer Graphic Proceedings, Annual Conference Series, 1993; Ned Green, et al.; Hierarchical Z-Buffer Visibili
Hewlett--Packard Company
Nguyen Phu K.
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