Method and apparatus for performing timing analysis on a circuit

Details Method and apparatus for performing timing analysis on a circuit Method and apparatus for performing timing analysis on a circuit

1996-02-07

1998-02-17

Teska, Kevin J.

Boots, shoes, and leggings

364578, G06F 1750

Patent

active

057197830

ABSTRACT:
A method and apparatus for efficiently performing timing analysis on a circuit design. The present invention essentially provides a hybrid between a path enumeration algorithm and a critical path algorithm. As such, the present invention increases the number and degree of timing violations reported by a Critical Path Analysis (CPA) algorithm, while maintaining a performance advantage over a Path Enumeration (PE) algorithm. This is accomplished by providing a number of "pseudo" clocks to selected latches within the circuit design database, thereby tricking the CPA algorithm into reporting more timing violations than would otherwise be reported.

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Tufte, "CML III Bipolar Standard Cell Library", Proceedings of the 1988 Bipolar Circuits and Technology Meeting, Minneapolis, Minnesota, Sep., 1988, pp. 180-182.

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