Computer graphics processing and selective visual display system – Computer graphic processing system – Interface
Reexamination Certificate
1998-08-28
2001-02-13
Tung, Kee M. (Department: 2671)
Computer graphics processing and selective visual display system
Computer graphic processing system
Interface
C345S502000
Reexamination Certificate
active
06188412
ABSTRACT:
FIELD OF THE INVENTION
The invention relates generally to video graphics processing and more particularly to a method and apparatus for performing setup operations prior to rasterization in a video graphics system.
BACKGROUND OF THE INVENTION
Computers are used in many applications. As computing systems continue to evolve, the graphical display requirements of the systems become more demanding. This is especially true in applications where detailed graphical displays must be updated quickly. Displaying complex graphical images involves a great deal of calculations that determine the final color of each pixel in the display. These calculations can become so complex that they create a bottleneck in the display generation process.
In a typical video graphics system, screen displays are made up of a plurality of graphical primitives. Rasterization is the process by which a primitive is converted to a two-dimensional image. Rasterization can be split into two parts. The first part includes setup operations in which the values of parameters such as color and depth are calculated for the primitive. The parameters can vary across the primitive, and the range of variance can be significant. For example, the color of a primitive can vary greatly from one portion of the primitive to another. The second part of rasterization, actual rasterization, is performed by a rasterizer that expects scan line and pixel data for each primitive. Setup operations take representations of primitives in screen space and perform operations on the representations such that the results are properly formatted for the rasterizer. After setup, no per-primitive operations should be required.
Larger primitives and primitives with a greater variance in a particular parameter require more complex calculations. Complex calculations that involve a large number of data bits require large multipliers. Although large multipliers are capable of performing these complex calculations, they are slow and take up a great deal of area on integrated circuits. In order to speed up some setup operations, prior art systems have employed more than one multiplier, allowing these multipliers to operate in parallel. Each of these multipliers must be sized to accommodate the worst case calculation that can arise in the system. Therefore, if the worst case calculation would require a 32-bit multiplier, all multipliers will need to be 32-bits wide. Implementing multiple multipliers of this size can be prohibitively expensive, and each suffers from the lack of speed associated with large multipliers.
The lack of speed of the large multipliers causes a system that has an occasional large or complex primitive to suffer a large speed penalty. It is often the case that in such systems, the majority of the primitives are small and could be handled with smaller less-complex multipliers. However, because of the occasional large primitive, the system must include large multipliers as the small multipliers are unable to handle large primitives.
Consequently, a need exists for a method and apparatus for performing setup operations that will accommodate both large and small primitives in a fast, efficient manner.
REFERENCES:
patent: 5872902 (1999-02-01), Kuchkuda et al.
ATI Technologies Inc.
Markison & Reckamp, P.C.
Tung Kee M.
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