Method and apparatus for performing page table walks in a microp

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395800, 395383, G06F 1212

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active

056805659

ABSTRACT:
A page table walk is performed in response to a data translation lookaside buffer miss based on a speculative memory instruction. In the event of a data translation lookaside buffer miss, a page miss handler determines whether the memory micro-instruction causing the miss is a speculative or non-speculative micro-instruction. If non-speculative, the page miss handler performs a non-speculative page table walk. If the memory micro-instruction causing the miss is a speculative micro-instruction, the page miss handler initiates a speculative page table walk. While performing the speculative page table walk, the page miss handler determines whether page table memory accessed during the page table walk is speculateable or non-speculateable memory. If non-speculateable, the speculative page table walk is aborted. A micro-instruction assisted page table walk is performed whenever access or dirty bits must be set for the pages accessed in the page table walk.

REFERENCES:
patent: 5136697 (1992-08-01), Johnson
patent: 5226126 (1993-07-01), McFarland et al.
patent: 5230068 (1993-07-01), Van Dyke et al.
patent: 5313634 (1994-05-01), Eickemeyer
patent: 5327547 (1994-07-01), Stiles et al.
patent: 5377336 (1994-12-01), Eickemeyer et al.
patent: 5381533 (1995-01-01), Peleg et al.
patent: 5394529 (1995-02-01), Brown, III et al.
patent: 5404467 (1995-04-01), Saba et al.
patent: 5421022 (1995-05-01), McKeen et al.
patent: 5442766 (1995-08-01), Chu et al.
patent: 5553255 (1996-09-01), Jain et al.
Asprey et al. "Performance Features of the PA7100 Microprocessor" IEEE Micro, Jun. 1993, pp.22-35.
Knebel et al. "HP's PA7100LC: A Low-Cost SuperScalar PA-RISC Processor," COMPCON IEEE Comp. Soc. Int'l Conf., 1993, pp. 441-447.
Moore, "The Power PC 601 Microprocessor," COMPCON IEEE Comp. Soc. Int'l Conf. 1993, pp. 109-116.
Diefendorff, "Organization of the Motorola 88110 Superscalar RISC Microprocessor," IEEE Micro, Apr. 1996, pp. 40-63.
Yeager, Kenneth C. "The MIPS R10000 Superscalar Microprocessor." IEEE Micro, Apr. 1996, pp. 28-40 Apr. 1996.
Smotherman et al. "Instruction Scheduling for the Motorola 88110" Microarchitecture 1993 International Symposium, pp. 257-262.
Circello et al., "The Motorola 68060 Microprocessor," COMPCON IEEE Comp. Soc. Int'l Conf., Spring 1993, pp. 73-78.
"Superscalar Microprocessor Design" by Mike Johnson, Advanced Micro Devices, Prentice Hall, 1991.
Popescu, et al., "The Metaflow Architecture," IEEE Micro, pp. 10-13 and 63-73, Jun. 1991.

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