Electricity: measuring and testing – Fault detecting in electric circuits and of electric components – Of individual circuit component or element
Patent
1997-02-04
1999-07-27
Karlsen, Ernest F.
Electricity: measuring and testing
Fault detecting in electric circuits and of electric components
Of individual circuit component or element
324765, 39518301, G01R 3128
Patent
active
059296500
ABSTRACT:
A method of detecting defective CMOS devices by quiescent current (IDDQ) behavior using a monitor circuit resident in the expendable areas of a die and/or wafer. One embodiment of the present invention incorporates a monitor unit (10) into the scribe grid of a wafer, where pads (2, 3, 4) are built in the corners of the die (5) and connected to the monitor unit (10) via metal connects in the wafer. The monitor unit (10) determines defective die based on IDDQ as expressed by decay of voltage (Vdd) in time, where Vdd is supplied to a die by way of a switch (20) in the monitor unit (10). Alternate embodiments incorporate various configurations and incorporate functional and other tests into a wafer level test system. Other embodiments provide the monitor unit on the die, allowing for later testing and user confirmation.
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Keating, et al., "A New Approach To Dynamic IDD Testing," International Test Conf., pp. 316-321 (1987).
Ash Robert
Crouch Alfred Larry
Pappert Bernard J.
Shepard Clark
Godsey Sandra L.
Hill Daniel D.
Karlsen Ernest F.
Motorola Inc.
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