Method and apparatus for performing multiple stage physical...

Computer-aided design and analysis of circuits and semiconductor – Integrated circuit design processing – Logic design processing

Reexamination Certificate

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C716S116000, C716S119000, C716S126000, C716S132000

Reexamination Certificate

active

07996797

ABSTRACT:
A method for designing a system on a target device includes entering the system. The system is synthesized. The system is mapped. The system is placed on the target device. The system is routed. Physical synthesis is performed on the system immediately after more than one of the entering, synthesizing, mapping, placing and routing procedures.

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Sawada, H., et al. “Logic Synthesis for Look-up Table Based FPGAs Using Functional Decomposition and Support Minimization”, IEEE/ACM International Conference on Computer-Aided Design, Nov. 5-9, 1995, ICCAD-95, pp. 353-358.

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