Method and apparatus for performing incremental placement on...

Details Method and apparatus for performing incremental placement on... Method and apparatus for performing incremental placement on...

2005-12-06

2011-10-04

Chiang, Jack (Department: 2825)

Computer-aided design and analysis of circuits and semiconductor

Integrated circuit design processing

Physical design processing

C716S119000, C716S132000, C716S134000

Reexamination Certificate

active

08032855

ABSTRACT:
A method for placing a system on a structured application specific integrated circuit (ASIC) using an electronic design automation tool is disclosed. A subregion that includes an illegal position in a placement solution is identified. All structured ASIC cells in the subregion are removed. Positions for all the structured ASIC cells that are legal are determined.

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