Electrical computers: arithmetic processing and calculating – Electrical digital calculating computer – Particular function performed
Reexamination Certificate
2003-06-30
2008-07-01
Malzahn, D. H. (Department: 2193)
Electrical computers: arithmetic processing and calculating
Electrical digital calculating computer
Particular function performed
C712S221000
Reexamination Certificate
active
07395302
ABSTRACT:
A method and apparatus for including in a processor instructions for performing horizontal intra-add operations on packed data. One embodiment of the processor is coupled to a memory. The memory has stored therein at least a first packed data. The processor performs operations on data elements in the first packed data to generate a plurality of data elements in a second packed data in response to receiving an instruction. At least two of the plurality of data elements in the second packed data store the results of an intra-add operation, at least one of these results coming from the operation on data elements of the first packed data. One embodiment of a software method utilizes horizontal intra-add instructions for performing butterfly computations as may be employed, for example, in Walsh-Hadamard transforms or in Fast-Fourier Transforms.
REFERENCES:
patent: 3711692 (1973-01-01), Batcher
patent: 3723715 (1973-03-01), Chen et al.
patent: 4161784 (1979-07-01), Cushing et al.
patent: 4189716 (1980-02-01), Krambeck
patent: 4393468 (1983-07-01), New
patent: 4418383 (1983-11-01), Doyle et al.
patent: 4498177 (1985-02-01), Larson
patent: 4630192 (1986-12-01), Wassel et al.
patent: 4707800 (1987-11-01), Montrone et al.
patent: 4760525 (1988-07-01), Webb
patent: 4771379 (1988-09-01), Ando et al.
patent: 4785393 (1988-11-01), Chu et al.
patent: 4785421 (1988-11-01), Takahashi et al.
patent: 4901270 (1990-02-01), Galbi et al.
patent: 4989168 (1991-01-01), Kuroda et al.
patent: 5095457 (1992-03-01), Jeong
patent: 5187679 (1993-02-01), Vassiliadis et al.
patent: 5201056 (1993-04-01), Daniel et al.
patent: 5327369 (1994-07-01), Ashkenazi
patent: 5339447 (1994-08-01), Balmer
patent: 5390135 (1995-02-01), Lee et al.
patent: 5418736 (1995-05-01), Widigen et al.
patent: 5442799 (1995-08-01), Murakami et al.
patent: 5448703 (1995-09-01), Amini et al.
patent: 5517626 (1996-05-01), Archer et al.
patent: 5530661 (1996-06-01), Garbe et al.
patent: 5537601 (1996-07-01), Kimura et al.
patent: 5541865 (1996-07-01), Ashkenazi
patent: 5586070 (1996-12-01), Pucell
patent: 5677862 (1997-10-01), Peleg et al.
patent: 5678009 (1997-10-01), Bains et al.
patent: 5721697 (1998-02-01), Lee
patent: 5721892 (1998-02-01), Peleg et al.
patent: 5734874 (1998-03-01), Van Hook et al.
patent: 5815421 (1998-09-01), Dulong et al.
patent: 5819117 (1998-10-01), Hansen
patent: 5822232 (1998-10-01), Dulong et al.
patent: 5859790 (1999-01-01), Sidwell
patent: 5862067 (1999-01-01), Mennemeier et al.
patent: 5875355 (1999-02-01), Sidwell et al.
patent: 5880984 (1999-03-01), Burchfiel et al.
patent: 5880985 (1999-03-01), Makineni et al.
patent: 5883824 (1999-03-01), Lee et al.
patent: 5887186 (1999-03-01), Nakanishi
patent: 5901301 (1999-05-01), Matsuo et al.
patent: 5918062 (1999-06-01), Oberman et al.
patent: 5983256 (1999-11-01), Peleg et al.
patent: 5983257 (1999-11-01), Dulong et al.
patent: 6006316 (1999-12-01), Dinkjian
patent: 6014684 (2000-01-01), Hoffman
patent: 6014735 (2000-01-01), Chennupaty et al.
patent: 6016538 (2000-01-01), Guttag et al.
patent: 6041404 (2000-03-01), Roussel et al.
patent: 6115812 (2000-09-01), Abdallah et al.
patent: 6122725 (2000-09-01), Roussel et al.
patent: 6211892 (2001-04-01), Huff et al.
patent: 6212618 (2001-04-01), Roussel
patent: 6230253 (2001-05-01), Roussel et al.
patent: 6230257 (2001-05-01), Roussel et al.
patent: 6240437 (2001-05-01), Guttag et al.
patent: 6288723 (2001-09-01), Huff et al.
patent: 6370558 (2002-04-01), Guttag et al.
patent: 6418529 (2002-07-01), Roussel
patent: 6961845 (2005-11-01), Roussel
patent: 0 318 957 (1989-06-01), None
patent: 2563349 (1985-10-01), None
patent: 97/08608 (1997-03-01), None
patent: WO-9708610 (1997-03-01), None
patent: 97/23821 (1997-07-01), None
21164 Alpha Microprocessor Data Sheet, Samsung Electronics, 1997, pp. I-vii, 1, 2-1 through 2-6, 3-1 through 3-14, 4-1 through 4-10, 49-51, 55-59, 63-77.
“64-bit and Multimedia Extensions in the PA-RISC 2.0 Architecture”, Computing Directory Technologies Precision Architecture Document, Jul. 17, 1997.
AMD-3D Technology Manual, Advance Micro Devices, Inc. (AMD), Publication #21928, Feb. 1998, pp. i-x, 1-58.
Barad, et al., “Intel's Multimedia Architecture Extension”, 19th Convention of Electrical and Electronics Engineers in Israel, 1996, pp. 148-151.
“Bit Zone Accumulator”, IMB Technical Disclosure Bulletin (XP000 308791), vol. 35, No. 1A, Jun. 1992, p. 106.
Case, “Philips Hopes to Displace DSPs with VLIW”, Microprocessor Report, Dec. 1994, pp. 12-15.
“Errata to MC88110 Second Generation RISC Microprocessor User's Manual”, Motorola Semiconductor Technical Data (Doc. # MC8810UMA/AD), Motorola Inc., Sep. 1992.
Gwennap, “New PA-RISC Processor Decodes MPEG Video”, Microprocessor Report, Jan. 1994, pp. 16-17.
Hansen, “Architecture of a Broadband Mediaprocessor”, Proceedings of COMPCON '96, 1996, pp. 334-354.
Intel i750, i860, i960 Processors and Related Products, 1993 pp. 1-3.
Levinthal, et al., “Parallel Computers for Graphics Applications,” Proceedings: ASPLOS II, Oct. 1987, pp. 193-198.
Levinthal et al., Chap—A SIMD Graphics Processor, Computer Graphics, vol. 18 No. 3, Jul. 1984, pp. 77-82.
MC88110 Programmer's Reference Guide, Motorola Semiconductor Technical Data, Rev. 1, Dec. 1992, Doc. #MC88110PRG/D, Motorola Inc., 1992, pp. 1-5.
MC88110 Second Generation RISC Microprocessor User's Manual, Doc. #MC8110UM/AD, Motorola Inc., 1991.
MIPS V Instruction Set, MIPS V Specification, Rev. 1.0, SiliconGraphics, Inc., pp. B-1 through B-37.
MIPS Digital Media Extension, Rev. 1.0, SiliconGraphics, Inc., pp. C-1 through C-40.
MIPS Extension for Digital Media with 3D, MIPS Technology, Inc. Mar. 12, 1997, pp. 0-26.
Peleg, et al., U.S. Appl. No. 08/521,360, “A Set of Instructions for Operating on a Packed Data”; filed Aug. 31, 1995; assigned to Intel Corporation; now abandoned.
Shipnes, “Graphics Processing with the 88110 RISC Microprocessor”, IEEE (1992), pp. 169-174.
Slater, Michael, “MicroUnity Lifts Veil on MediaProcessor: New Architecture Designed for Broadband Communication,” Microprocessor Report, Oct. 23, 1995, pp. 11-18.
“Silicon Graphics Introduces Enhanced MIPS Architecture to Lead the Interactive Digital Revolution”, SiliconGraphics, Inc. Oct. 21, 1996, pp. 1-2.
“UltraSPARC Multimedia Capabilities On-Chip Support for Real-Time Video and Advanced Graphics”, SPARC Technology Business, Sun Microsystems, Sep. 1994.
Tasic, et al., “Comparison of Some Parallel Matrix Multiplication Algorithms”, 8th Mediterranean Electrotechnical Conference, Melecon '96, vol. 1, 1996, pp. 155-158.
TM100 Preliminary Data Book, Philips Semiconductors, Jul. 1, 1997, pp. A-74, A133-138, A161.
TMS320C2x User's Guide, Digital Signal Processing Products, Texas Instruments, 1993, pp. 3-2 through 3-11; pp. 3-28 through 3-34; pp. 4-1 through 4-22; pp. 4-41, 4-103 through 4-120; pp. 4-122, 4-150 through 4-151.
Wang, Y.,et al., A Processor Architecture for 3D Graphics Calculations, Computer Motion, Inc., pp. 1-23.
VIS Instruction Set User's Manual (Part #805-1394-01), Sun Microsystems, Jul. 1997, pp. i-xii, 1-136.
“COMPLAINT”, In the United States District Court for the District of Delaware, In the matter ofTransmetav.Intel Corporation, (Oct. 11, 2006), 1-7.
“First Amended Complaint”, In the United States District Court for the District of Delaware, In the matter ofTransmeta Corporationv.Intel Corporation, C.A. No. 06-663 (GMS), (Dec. 12, 1006), 1-8.
“Intel Corporation's Answer, Affirmative Defenses, and Counterclaims to Transmeta's First Amended Complaint”, In the United States District Court for the District of Delaware, In the matter ofTransmeta Corporationv.Intel Corporation, Civil Action No. 06-663-GMS, (Jan. 9, 2007), 1-27.
“Transmeta Corporation's Reply to Intel Corporation's Counterclaims to the First Amended Complaint”, In the United States District Court for the District of
Buxton Mark J.
Debes Eric
Macy William W.
Nguyen Huy V.
Roussel Patrice
Blakely , Sokoloff, Taylor & Zafman LLP
Malzahn D. H.
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