Method and apparatus for performing floating point arithmetic op

Details Method and apparatus for performing floating point arithmetic op Method and apparatus for performing floating point arithmetic op

1994-03-29

1995-07-18

Envall,, Jr.

Boots, shoes, and leggings

364745, 364748, G06F 738

Patent

active

054348099

ABSTRACT:
An approximate square root Ya of a given value X is derived by referring to a relation Y=X.sup.1/2 at an accuracy at which an error between the approximate square root Ya and an infinitely precise square root Y is smaller than a weight of a digit in a digit place which is lower by two digit places than a least significant digit place for a final square root. The approximate square root Ya is rounded to an interim square root Yr equal to one of possible interim square roots which is closest to the approximate square root Ya. A value Xr is derived from the interim square root Yr using a relation Xr=Yr2. A sticky digit S is set to 0, 1, or -1 in response to a relation between the values X and Xr. The sticky digit S is added to a digit place having an order immediately lower than a lowest order digit place of the interim square root Yr, and a result of the addition is rounded in a designated rounding mode to obtain the final square root.

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Proceedings IEEE ICCD:VLSI in Computers & Processors, Mass. 2-4 Oct. 1989, pp. 366-368; Lu et al.; "A VLSI Module for IEEE Floating Point Multiplication/Division/Square Root".
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