Method and apparatus for performing electrical rule checks...

Details Method and apparatus for performing electrical rule checks... Method and apparatus for performing electrical rule checks...

2011-04-26

2011-04-26

Dinh, Paul (Department: 2825)

Computer-aided design and analysis of circuits and semiconductor

Integrated circuit design processing

Physical design processing

C716S106000, C716S107000, C716S110000, C716S112000, C716S126000, C703S013000, C703S019000

Reexamination Certificate

active

07934187

ABSTRACT:
Method, apparatus, and computer readable medium for performing electrical rule checks (ERCs) on a circuit design are described. In one example, a hierarchy of cell instances is created from a schematic database for the circuit design. The hierarchy is traversed to produce master nets. Each of the master nets is associated with shorted nets in the circuit design. The hierarchy is traversed to produce ERC nets. Each of the ERC nets is associated with effectively shorted nets in the circuit design. At least one pair of the effectively shorted nets is effectively shorted across a transistor. At least one ERC is performed on the circuit design using the master nets and the ERC nets.

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