Method and apparatus for performing dual scan path testing of an

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G06F 1700

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054854660

ABSTRACT:
A data processing system (10) implements state machine (82) and register logic (80) such that no external control or data is required during execution of a dual scan path test operation. Prior to execution of the dual scan path test operation, a user of data processing system (10) initializes a system with a plurality of values which will be used during execution of the dual scan path test operation. After initialization, data processing system (10) executes the dual scan path test operation automatically and requires no additional information from the user.

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Eytan Hartung, Mike Gladden and Oded Yishay, "A Dual Pass Scan Mechanism for Minimizing Serial Scan Outputs", Jul. 1981, Motorola Technical Developments, vol. 13, pp. 14-15.
J. Lyon, M. Gladden, E. Hartung, E. Hoang, and K. Raghunathan, "Testability Features of the 68HC16Z1", 1991 IEEE Intl. Test Conference on Oct. 28, 1991; submitted after Jul. 16, 1991; pp. 5-6.
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