Method and apparatus for performing deferred transactions

Details Method and apparatus for performing deferred transactions Method and apparatus for performing deferred transactions

1996-06-26

1999-08-10

Lane, Jack A.

Communications: electrical

Land vehicle alarms or indicators

Internal alarm or indicator responsive to a condition of the...

395292, 395831, 395859, 34082507, 34082552, H04L 12417, G06F 1314

Patent

active

059371714

ABSTRACT:
A method and apparatus of performing bus transactions on the bus of the computer system. The present invention includes a method and apparatus for permitting out-of-order replies in a pipelined bus system. The out-of-order responses include the sending of tokens between both the requesting agents and the responding agents in the computer system without the use of dedicated token buses.

REFERENCES:
patent: 4181974 (1980-01-01), Lemay et al.
patent: 4488232 (1984-12-01), Swaney et al.
patent: 4841436 (1989-06-01), Asano et al.
patent: 5006982 (1991-04-01), Ebersole et al.
patent: 5197137 (1993-03-01), Kumar et al.
patent: 5235684 (1993-08-01), Becker et al.
European Search Report dated Feb. 1, 1996; App. No. G06F13/14.
Val Popescu, Merle Schultz, John Spracklen, Gary Gibson, Bruce Lightner and David Isaman, "The Metaflow Architecture", IEEE Micro, Jun. 1991, pp. 10-13 and 63-73.

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