Method and apparatus for performing a snoop-retry protocol in a

Details Method and apparatus for performing a snoop-retry protocol in a Method and apparatus for performing a snoop-retry protocol in a

1995-02-09

1996-04-09

Auve, Glenn A.

395473, G06F 1314, G06F 1342

Patent

active

055069711

ABSTRACT:
A data processing system (10) and method for performing a snoop-retry protocol using an arbiter (14). Multiple bus masters (12, 16, 17) are coupled to multiple shared buses (20, 22, 24, 26). Each bus master (12, 16, 17) may initiate a bus transaction ("initiating master"), or snoop the bus transaction ("snooping bus master") occurring on a shared bus (20). When an initiating processor requests access to a dirty cache line in a memory (18), a snooping bus master asserts a shared address retry (ARTRY*) signal to inform the initiating processor to relinquish ownership of the shared bus (20) and retry the bus transaction. Upon detecting the shared ARTRY* signal, all potential bus masters remove their bus requests and ignore any bus grants from the arbiter (14), thus allowing the snooping processor which asserted the ARTRY* signal to gain ownership of the shared bus (20) to perform the snoop copyback. The arbiter (14) provides simple arbitration support to guarantee the update of the memory (18) has the highest priority among masters ( 12, 16, 17).

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