Pulse or digital communications – Pulse code modulation – Differential
Patent
1997-07-22
1999-10-26
Chin, Stephen
Pulse or digital communications
Pulse code modulation
Differential
330 10, 330207A, H04B 1406
Patent
active
059740892
ABSTRACT:
The transition time of power switching devices ultimately limits the rate at which such devices can be switched. Because the occurrence of unacceptably narrow pulses is relatively rare in an oversampled, noise-shaping signal processor, the elimination of such narrow pulses is introduced through the use of circuitry in the modulator loop which constrains the time between transitions to be greater than or equal to some minimum time period which, in turn provides for a smooth interface to power switching devices. However, because of the delay introduced by this pulse qualification circuitry, the modulator loop sampling frequency is increased to deal with any resulting instability. Thus, an oversampled, noise shaping signal processor is described having at least one integrator stage in a feedback loop. A sampling stage in the feedback loop is coupled to the at least one integrator stage. The sampling stage samples an analog signal at a sample frequency. Qualification logic coupled to the sampling stage receives a pulse waveform therefrom, and ensures that signal transitions in the pulse waveform occur more than a first time period apart and that the waveform can therefore be handled by, for example, a power switching device. A switching stage in the feedback loop is coupled to the qualification logic. The signal processor has a feedback path from the output of the switching stage to the input of the at least one integrator stage thereby closing the feedback loop.
REFERENCES:
patent: 4843339 (1989-06-01), Burt et al.
patent: 4939516 (1990-07-01), Early
patent: 5030952 (1991-07-01), Ledzius et al.
patent: 5352986 (1994-10-01), Modgil et al.
patent: 5451900 (1995-09-01), Haga
patent: 5565930 (1996-10-01), Bolger et al.
patent: 5777512 (1998-07-01), Tripathi et al.
James C. Candy, et al., "Oversampling Methods for A/D and D/A Conversation," Oversampling Delta-Sigma Data Converters, pp. 1-29.
H. Ballan, et al., "12V .SIGMA.--.DELTA.Class-D Amplifier in 5V CMOS Technology," 1995, Switzerland, IEEE, pp. 559-562.
T. Ritoniemi, et al., "Design of Stable High Order 1-Bit Sigma-Delta Modulators," May 1990, Finland, IEEE, pp. 127-130.
D. Grant, et al., "Theory and Applications," 1989, Canada, Power Mosfets.
B. Murari, et al., "Technologies and Applications," 1986, Berlin, Smart Power ICs.
J. Candy, et al., "Oversampling Delta-Sigma Data Converters," 1992, New York, IEEE .
Delano Cary L.
Tripathi Adya S.
Chin Stephen
Ghayour Mohammad
Tripath Technology Inc.
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