Method and apparatus for partially overmolded integrated circuit

Details Method and apparatus for partially overmolded integrated circuit Method and apparatus for partially overmolded integrated circuit

1992-01-22

1994-01-11

Picard, Leo P.

Electricity: electrical systems and devices

Housing or mounting assemblies with diverse electrical...

For electronic systems and devices

174 522, 174259, 257782, 257787, 257673, 361748, 361767, 361808, H05K 702

Patent

active

052787265

ABSTRACT:
A partially overmolded integrated circuit package (10) comprises a substrate (14) having circuit traces (11) and a semiconductor die receiving area (15) for attachment of a semiconductor die to the semiconductor die receiving area. Conductive bumps (18) are then applied to a plurality of contact pads on the semiconductor die. Then overmolding compound (16) is applied over the semiconductor die and a portion of the conductive bumps, leaving a portion of the conductive bumps partially exposed (19). Finally, interconnections (13) between the exposed portion of the conductive bumps and the circuit traces of the substrate are formed.

REFERENCES:
patent: 3903590 (1975-09-01), Yokogawa
patent: 4199777 (1980-04-01), Maruyama et al.
patent: 5091769 (1992-02-01), Eichelberger

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