Method and apparatus for parallel computation

Details Method and apparatus for parallel computation Method and apparatus for parallel computation

1988-11-02

1990-01-09

Goldstein, Herbert

Multiplex communications

Wide area network

Packet switching

370 941, H04Q 1104

Patent

active

048933031

ABSTRACT:
A method of parallel computation capable of processing information with an improved processing efficiency is disclosed. The method utilizes the message transfer in terms of message packets in abbreviated format and the recording of the route of the message transfer. An apparatus for performing the method is also disclosed.

REFERENCES:
patent: 4621359 (1986-11-01), McMillen
patent: 4630260 (1986-12-01), Toy et al.
patent: 4638495 (1987-01-01), Koike
patent: 4692917 (1987-09-01), Fujioka
W. J. Dally; A VLSI Architecture for Concurrent Data Structures, "The Torus Routing Chip"; pp. 170-183.
Judy M. Anderson et al.; "The Architecture of FAIM-1", Computer; Jan. 1987; pp. 55-65.

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