Electrical computers and digital processing systems: processing – Processing architecture – Long instruction word
Patent
1996-10-18
1999-11-09
An, Meng-Ai T.
Electrical computers and digital processing systems: processing
Processing architecture
Long instruction word
712 1, 712 23, 712200, 712205, 712208, 712210, 712214, 712215, G06F 930
Patent
active
059833360
ABSTRACT:
An unpacking circuit and operating method in a very long instruction word (VLIW) processor provides for parallel handling of a packed wide instruction in which a packed wide instruction is divided into groups of syllables. An unpacked instruction representation includes a plurality of syllables, which generally correspond to operations for execution by an execution unit. The syllables in the unpacked instruction representation are assigned to groups. The packed instruction word includes a sequence of syllables and a header. The header includes a descriptor for each group. The descriptor includes a mask and may include a displacement designator. The multiple groups are handled in parallel as the displacement designator identifies a starting syllable. The mask designates the syllables which are transferred from the packed instruction to the unpacked representation and identifies the position of NOPs in the unpacked representation.
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Artyomov Alexander M.
Lizorkin Alexey P.
Nazarov Leonid N.
Rudometov Vladimir V.
Sakhin Yuli Kh.
An Meng-Ai T.
El-Hady Nabil
Elbrush International Limited
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