Method and apparatus for overlay measurement

Image analysis – Image transformation or preprocessing – Measuring image properties

Reexamination Certificate

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Details

C382S151000, C382S295000

Reexamination Certificate

active

06463184

ABSTRACT:

FIELD OF THE INVENTION
The present invention relates, in general, to optical measurements and, more particularly, to pattern overlay measurements.
BACKGROUND OF THE INVENTION
State of the art semiconductor devices and integrated circuits include multi-layer structures having dimensions less then one micrometer. Proper alignment of different layers is essential for proper performance of the fabricated semiconductor devices and circuits. Overlay measurements are routinely performed to verify the proper alignment. Lack of proper alignment typically results in overlay measurement of specification and trigger rework.
Overlay measurements optically measure the relative positions of the overlay marks on different layers of a structure on the semiconductor wafer. More particularly, a rectangular overlay mark is formed on each layer of the structure. When two rectangular overlay marks on two consecutive layers are centered with respect to each other, the two layers are properly aligned to each other. The rectangular overlay marks are also referred to as box-in-box patterns. In terms of width, length, pattern density, etc., the box-in-box overlay patterns differ significantly from the device related array patterns on the wafer. Furthermore, the fabrication processes, e.g., lithography, etch, strip, fill, etc., are optimized for the best performance of the device related array patterns. They often result in reduced overlay mark integrity. These factors adversely affect the overlay measurement capabilities. In addition, optically measuring the edge positions of a box-in-box pattern having dimensions less than one micrometer is difficult.
Accordingly, it would be advantageous to have a method and an apparatus for an overlay measurement that are easy to implement in submicron ranges. It is desirable for the capability of the overlay measurement not to be adversely affected by the semiconductor device fabrication processes. It would be of further advantage for the apparatus to be simple and cost efficient.
SUMMARY OF THE INVENTION
Generally, the present invention provides a method and an apparatus for overlay measurement. In accordance with the present invention, repetitive patterns are formed on different levels or layers to be aligned with each other. The patterns serve as overlay alignment marks. Preferably, the repetitive overlay marks on different levels have periods substantially equal to each other. Further, they are preferably substantially equal to the period of the product pattern. An image processor transforms the images of the repetitive overlay marks into phase images. The overlay measurement is performed by analyzing the phase difference between the repetitive overlay marks on different levels.


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patent: 6088103 (2000-07-01), Everett et al.
patent: 6150231 (2000-11-01), Muller et al.

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