Computer graphics processing and selective visual display system – Computer graphic processing system – Plural graphics processors
Patent
1995-12-22
1998-05-19
Tung, Kee M.
Computer graphics processing and selective visual display system
Computer graphic processing system
Plural graphics processors
345191, 345523, G06F 1300
Patent
active
057541914
ABSTRACT:
A method and apparatus for improving pixel data write operations to a tile-based frame buffer. The present invention includes a byte enable first-in first-out register for storing byte enable data for masking pixel data writes to a tile based frame buffer when the pixel data crosses a tile boundary. Pixel data generated by a graphics processor to the frame buffer may traverse multiple tiles. With each 64-bits of pixel data generated, a corresponding byte of byte enable data is generated as mask data for the frame buffer. The byte enable circuit of the present invention may be implemented as a circular shift register to allow the byte enable data to be shifted, rather than being "popped" after the pixel data has been written to the frame buffer. By shifting data rather than "popping" data, the byte enable circuit is able to retain portions of the byte enable data to enable a correct write of a pixel word which may traverse tile boundaries.
REFERENCES:
patent: 5170468 (1992-12-01), Shah et al.
patent: 5198804 (1993-03-01), Mori
patent: 5444845 (1995-08-01), Cho
Bonnelycke Mark Emil
Holmes Jeffrey Michael
Mills Karl Scott
Owen Richard Charles Andrew
Cirrus Logic Inc.
Shaw Steven A.
Tung Kee M.
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