Excavating
Patent
1996-04-30
1999-02-09
Beausoliel, Jr., Robert W.
Excavating
324757, G01R 3128
Patent
active
058704086
ABSTRACT:
Circuits and methods of testing an integrated circuit die are disclosed. Active logic setting circuits are incorporated into input cells of a die. During testing, the active logic setting circuits weakly drive the input cells to a definite logic level. Therefore, the necessity of connecting probes to all of the input pads to prevent floating signals in the die is eliminated. Furthermore, during normal operations the active logic setting circuits have little or no effect on the performance of the die.
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Aggarwal Sandeep K.
Bertucci David F.
Levitt Marc E.
Beausoliel, Jr. Robert W.
Iqbac Nadeem
Sun Microsystems Inc.
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