Method and apparatus for obtaining the quotient of two numbers w

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364765, G06F 752

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active

050200178

ABSTRACT:
A divider circuit for producing a quotient result within one cycle time is provided. The invention utilizes combinational circuitry for performing a division operation by computing a scaled reciprocal of the denominator, and multiplying the scaled output by a similarly scaled numerator. The denominator is scaled such that it falls within a predetermined range, and the reciprocal value may be looked up from a memory device such as a ROM. The output of the multiplier may also be scaled in order to produce the desired result. The resulting quotient has a controlled error over a wide range of numerator and denominator input values.

REFERENCES:
patent: 3648038 (1972-03-01), Sierra
patent: 4567568 (1986-01-01), Inagawa et al.
patent: 4607343 (1986-08-01), Chevillat et al.
patent: 4636973 (1987-01-01), Cantwell
patent: 4718031 (1988-01-01), Nukiyama
patent: 4718032 (1988-01-01), Irukulla et al.
patent: 4823301 (1989-04-01), Knierim
"WTL 1032/1033, Floating Point Division/Square Root/IEEE Arithmetic", A Publication of Weitek, 1983, pp. 1-10.

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