Method and apparatus for obtaining and using antifuse testing in

Details Method and apparatus for obtaining and using antifuse testing in Method and apparatus for obtaining and using antifuse testing in

1995-10-16

1998-09-29

Voeltz, Emanuel Todd

Boots, shoes, and leggings

702134, 702171, 371 222, G01R 3107, G06F 1718, G11C 2900

Patent

active

058154043

ABSTRACT:
A method and apparatus for creating and utilizing a database of defective antifuses on a programmable logic device and comparing the list to a catalog of required connections in a design, wherein the process of comparing the two lists will determine whether the device, although flawed, is nonetheless compatible with the design to be implemented, thereby increasing device yield.

REFERENCES:
patent: 4718042 (1988-01-01), Moll et al.
patent: 5272388 (1993-12-01), Bakker
patent: 5341092 (1994-08-01), El-Ayat et al.
patent: 5349248 (1994-09-01), Parlour et al.
patent: 5430734 (1995-07-01), Gilson
El-Ayat, K. A. et al. ("An architecture for electrically configurable gate arrays", IEEE Journal of Solid-State Circuits, vol. 24, No. 2, Apr. 1989, pp. 394-398).
Roy, K. ("On Fault modeling and fault tolerance antifuse based FPGAs", IEEE, Proceedings of the 1993 IEEE International Symposium on Circuits and Systems, vol. 3, 3 May 1993, pp. 1623-1626).

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