Patent
1995-01-17
1998-06-16
Nguyen, Hoa T.
39518401, G06F 1130, G06F 1100
Patent
active
057684960
ABSTRACT:
A microprocessor fault logging arrangement includes a detector for detecting hardware and software faults 3, 4, 8, which produce an interrupt signal which is applied to the non-maskable interrupt input NMI of microprocessor 1 and, which is also applied via delay circuit 5, to the RESET input of microprocessor 1. The NMI input causes microprocessor 1 to store the state of selected system parameters in a log of fault records stored in a non-volatile memory 2, the selected parameters being stored for fault analysis each time an NMI input signal is generated interrupt signal is applied to the NMI input. The delay circuit 5 allows sufficient time for the selected parameters to be stored in the non-volatile memory 2 before the microprocessor is reset.
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IBM Technical Disclosure Bulletin, vol. 29, No. 10, Mar. 1987 New York, US, pp. 4489-4491, "Method Of Saving Error Data".
Deo Vinay
Field Peter
Keller-Tuberg Stefan
Lidgett Rosemary
Nour Joseph
Alcatel Australia Limited
Nguyen Hoa T.
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