Excavating
Patent
1991-06-28
1994-06-28
Beausoliel, Jr., Robert W.
Excavating
371 491, G06F 1110
Patent
active
053253752
ABSTRACT:
The method and apparatus provides a parity bit for every m multiples of b bits, a group of b bits being the smallest number of bits that can be manipulated by the CPU. The parity bit is computed for the entire m x b bits during a write operation, even if only a subset of the m multiples of b bits is being stored. The write operation is implemented as a read-modify-write operation of the entire m x b bits, with parity error reporting suppressed for the read portion of the operation. However, the parity bit is set factoring in whether a parity error is detected during the read portion of the operation. The parity bit for the entire m x b bits is checked during a read operation, even if only a subset of the m multiples of b bits is needed. Any detected parity error is reported to the CPU. As a result, hardware cost is substantially reduced with minimal degradation to data integrity. Furthermore, the method and apparatus is completely transparent to the CPU and the operating system.
REFERENCES:
patent: 4019033 (1977-04-01), Parmet
patent: 4942575 (1990-07-01), Earnshaw et al.
patent: 4980888 (1990-12-01), Bruce et al.
patent: 4993028 (1991-02-01), Hillis
Beausoliel, Jr. Robert W.
Chung Phung M.
Sun Microsystems Inc.
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