Method and apparatus for no-latency conditional branching

Details Method and apparatus for no-latency conditional branching Method and apparatus for no-latency conditional branching

2005-11-22

2005-11-22

Chaki, Kakali (Department: 2193)

Data processing: software development, installation, and managem

Software program development tool

Translation of code

C717S140000, C717S151000, C712S234000, C712S236000

Reexamination Certificate

active

06968545

ABSTRACT:
An apparatus to perform no-latency conditional branching has a sequencer for executing program instructions including one or more conditional branch instructions. The conditional branch instruction is a binary word specifying a branch condition address and a conditional instruction. The branch unit has a programmable flag selection memory and a plurality of first flag selectors and determines in hardware whether to branch according to the conditional instruction. Each first flag selector accepts a plurality of available flags and selects a flag based upon contents in the flag selection memory. A second flag selector accepts the flags from the first flag selectors and selects one of the flags to present as a branch flag based upon the branch condition address. The branch flag indicates whether to branch to the destination address.

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