Method and apparatus for multiple co-processor utilization of a

Details Method and apparatus for multiple co-processor utilization of a Method and apparatus for multiple co-processor utilization of a

1998-03-24

2000-09-26

Tung, Kee M.

Computer graphics processing and selective visual display system

Computer graphic processing system

Integrated circuit

345503, 345521, G06F 1516

Patent

active

061248681

ABSTRACT:
A method and apparatus for a processing system to utilize a ring buffer includes a host processor, memory, and at least one co-processor. The host processor generates a plurality of data blocks that relates to a particular application (e.g., word processing application, drafting application, presentation application, spreadsheet application, video game application, etc.). The host processor writes data elements of the data blocks into the memory, which is organized in a ring buffer manner. As the host processor enters the data elements into the ring buffer, it updates a head pointer, which indicates the most current address of a data element entered into the ring buffer, in its local cache. The co-processor retrieves the data elements from the ring buffer and performs a co-processor function in support of the particular application. As the co-processor retrieves data elements from the ring buffer, it updates a tail pointer, which indicates the most recently read data element from memory, or executed data element. The co-processor and host processor exchange the updated tail and header pointers as they are updated, such that both the co-processor and host processor have current records of the tail and header pointers.

REFERENCES:
patent: 5913923 (1999-06-01), Dunlap et al.
patent: 5925099 (1999-07-01), Futral et al.

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