Etching a substrate: processes – Gas phase etching of substrate
Reexamination Certificate
2008-01-07
2011-11-01
Tran, Binh X (Department: 1713)
Etching a substrate: processes
Gas phase etching of substrate
C216S072000, C216S074000, C438S703000, C438S717000, C438S736000
Reexamination Certificate
active
08048325
ABSTRACT:
A method for etching an organic anti-reflective coating (ARC) layer on a substrate in a plasma processing system comprising: introducing a process gas comprising ammonia (NH3), and a passivation gas; forming a plasma from the process gas; and exposing the substrate to the plasma. The process gas can, for example, constitute NH3and a hydrocarbon gas such as at least one of C2H4, CH4, C2H2, C2H6, C3H4, C3H6, C3H8, C4H6, C4H8, C4H10, C5H8, C5H10, C6H6, C6H10, and C6H12. Additionally, the process chemistry can further comprise the addition of helium. The present invention further presents a method for forming a bilayer mask for etching a thin film on a substrate, wherein the method comprises: forming the thin film on the substrate; forming an ARC layer on the thin film; forming a photoresist pattern on the ARC layer; and transferring the photoresist pattern to the ARC layer with an etch process using a process gas comprising ammonia (NH3), and a passivation gas.
REFERENCES:
patent: 5656128 (1997-08-01), Hashimoto et al.
patent: 5773199 (1998-06-01), Linliu et al.
patent: 6039888 (2000-03-01), Ha et al.
patent: 6080529 (2000-06-01), Ye et al.
patent: 6080678 (2000-06-01), Yim
patent: 6143476 (2000-11-01), Ye et al.
patent: 6352937 (2002-03-01), Kadomura et al.
patent: 6458516 (2002-10-01), Ye et al.
patent: 6617257 (2003-09-01), Ni et al.
patent: 6831019 (2004-12-01), Li et al.
patent: 2002/0111036 (2002-08-01), Zhu et al.
patent: 2002/0173142 (2002-11-01), Vanhaelemeersch et al.
patent: 2002/0173160 (2002-11-01), Keil et al.
patent: 2003/0003756 (2003-01-01), Yu
patent: 2003/0029835 (2003-02-01), Yauw et al.
patent: 2004/0092098 (2004-05-01), Sudijono et al.
patent: 2004/0150012 (2004-08-01), Jin et al.
patent: 2004/0185380 (2004-09-01), Igarashi et al.
patent: 2004/0224264 (2004-11-01), Xiao et al.
patent: 0517165 (1992-12-01), None
patent: 0813233 (1997-12-01), None
patent: 5-160081 (1993-06-01), None
patent: 10-56001 (1998-02-01), None
patent: 11-303183 (1999-11-01), None
patent: 2000-21864 (2000-01-01), None
patent: 2001-345380 (2001-12-01), None
patent: 2002-509353 (2002-03-01), None
patent: 14-538604 (2002-11-01), None
patent: 2003-051495 (2003-02-01), None
patent: 2003-100718 (2003-04-01), None
patent: 2003100718 (2003-04-01), None
patent: 99/31718 (1999-06-01), None
patent: 0051173 (2000-08-01), None
patent: 03030237 (2003-04-01), None
Japanese Office Action issued in Application No. 2006-508615 mailed Nov. 19, 2009.
Partial English translation of JP 2001-345380, published Dec. 14, 2001.
Machine English translation of JP 2001-345380, published Dec. 14, 2001.
Machine English translation of 2002-509353, published Mar. 26, 2002.
Machine English translation of 11-303183, published Nov. 2, 1999.
Machine English translation of 2003-100718, published Apr. 4, 2003.
Machine English translation of 2000-21864, published Jan. 21, 2000.
Machine English translation of 10-56001, published Feb. 24, 1998.
Rossnagel et al., Handbook of Plasma Processing, 1990, Noyes Publications, pp. 203-205.
Wolf, Silicon Processing for the VLSI Era, 2002, Lattice Press, vol. 4, p. 248.
Wolf et al., Silicon Processing for the VLSI Era, 1986, Lattice Press, vol. 1, pp. 565, 567.
Japanese Office Action issued in Application No. 2006-508615 mailed Nov. 9, 2010.
European Office Action issued in Application No. 04704022.5 mailed Oct. 19, 2010.
Machine English translation of JP 2003-100718, published Apr. 4, 2003.
Japanese Office Action issued in Application No. 2006-508615 mailed Jun. 15, 2010.
Machine English translation of JP 2003-051495, published Feb. 21, 2003.
Korean Office Action issued in Application No. 10-2005-7018198 mailed Sep. 30, 2009.
Machine English translation of JP 14-538604, published Nov. 12, 2002.
Machine English translation of JP 10-56001, published Feb. 24, 1998.
Machine English translation of JP 5-160081, published Jun. 25, 1993.
Balasubramaniam Vaidyanathan
Inazawa Koichiro
Inazawa Rie
Mahorawala Arpan
Panda Siddhartha
Tokyo Electron Limited
Tran Binh X
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