Cryptography – Communication system using cryptography – Time segment interchange
Reexamination Certificate
2007-01-09
2007-01-09
Song, Hosuk (Department: 2135)
Cryptography
Communication system using cryptography
Time segment interchange
C380S212000, C713S189000
Reexamination Certificate
active
09753281
ABSTRACT:
Techniques for performing multistage processing with feedback include a multi-stage feedback processor comprising a first plurality of processing stages connected in series. A feedback channel connects a last stage to one of the other stages. Each processing stage is configured to process one block of data from a data stream during one processing cycle. A parallel input queue includes a second plurality of input queues connected in parallel to the first stage. The parallel input queue directs a block to the first stage alternately from each of a third plurality of data streams. In an embodiment, the number of data streams is no greater than the number of input queues. This arrangement significantly improves throughput for multistage processing with feedback. The arrangement is suitable for encryption and decryption of network traffic using block-based symmetric ciphers.
REFERENCES:
patent: 4897876 (1990-01-01), Davies
patent: 5412665 (1995-05-01), Gruodis et al.
patent: 5729559 (1998-03-01), Bright et al.
“VMS115; high-speed IPSec coprocessor,” 2001, http://www.semiconductor.philips.com/pip/VMS115, Royal Philips Electronics, pp. 1-2.
“7951 Security Processor, Broadband Security Bargain Now with PCI Bus,” http://www.hifn.com/products/7951.html, Hifn, pp. 1-3.
“7902 Security Processor, Value-Priced Chip Powers High-Speed Small Office VPNs,” http://www.hifn.com/products/7902.html, Hifn, pp. 1-3.
“7901 Security Processor, Broadband Security Bargain,” http://www.hifn.com/products/7901.html, Hifn, pp. 1-3.
“7814/7854 HIPP Security Processors, Hifn Intelligent Packet Processing-HIPP-Guarantees System Performance,” http://www.hifn.com/products/HIPP7814-7854.html, Hifn, pp. 1-4.
“7851 HIPP Security Processor, Faster Routing With Full-Duplex OC-3 To OC-12 Security Processor Performance,” http://www.hifn.com/products/7851.html, Hifn, pp. 1-3.
“7811 Security Processor, Announcing Breakneck VPN Packet Performance,” http://www.hifn.com/products/7811.html, Hifn, pp. 1-3.
“7711 Security Processor, Interoperate with Everything Compress, Encrypt and Authenticate IPSEC Data Packets,” http://www.hifn.com/products/7711.html, Hifn, pp. 1-4.
“VMS113; Crytographic chip,” http://www.semiconductors.philips.com/pip/VMS113, pp. 1-2, Royal Philips Electronics.
“BCM5805 Security Processor,” Broadcom Corporation, pp. 1-2, 2000, Product Brief.
“BCM5820 Security Processor,” Broadcom Corporation, pp. 1-2, 2000, Product Brief.
“BCM5840 Security Processor,” Broadcom Corporation, pp. 1-2, 2000, Product Brief.
“Single-Chip Security,” Advance Data Sheet, BCM5805, pp. 1-48, Dec. 8, 2000, Broadcom Corporation.
Hussain Muhammad Raghib
Joly Christophe
Hickman Palermo & Truong & Becker LLP
Song Hosuk
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