Image analysis – Image compression or coding – Interframe coding
Patent
1995-12-12
1998-11-17
Mancuso, Joseph
Image analysis
Image compression or coding
Interframe coding
348154, 348700, 382107, G06K 936, G06K 946
Patent
active
058388281
ABSTRACT:
A method and apparatus for motion estimation in a video signal includes an edge detector for generating present and reference binary edge bit maps and a binary block matcher for receiving the present and reference binary edge bit maps from the edge detector and for generating a motion vector for each of a plurality of blocks in the binary edge bit maps. By using binary edge bit map data to generate motion vectors, computational requirements are reduced. If the apparatus is provided as an integrated circuit, the technique of the present invention reduces cost, power requirements and size of the integrated circuit.
REFERENCES:
patent: 4987357 (1991-01-01), Masaki
patent: 5008745 (1991-04-01), Willoughby
patent: 5027422 (1991-06-01), Peregrim et al.
patent: 5140538 (1992-08-01), Bass et al.
patent: 5150426 (1992-09-01), Banh et al.
patent: 5212547 (1993-05-01), Otsuki
patent: 5387947 (1995-02-01), Shin
patent: 5396284 (1995-03-01), Freeman
patent: 5469517 (1995-11-01), Ohta
patent: 5530483 (1996-06-01), Cooper et al.
patent: 5581308 (1996-12-01), Lee
patent: 5586202 (1996-12-01), Ohki et al.
patent: 5594813 (1997-01-01), Fandrianto et al.
"Motion Estimation Processor" SGS-Thomson Microelectronics St13220, Jul. 1992, pp. 97-121.
"Array Architectures for Block Matching Algorithms" Thomas Komarek and Peter Pirsch, IEEE Transactions on Circutis and Systems, vol. 36. No. 10, Oct. 1989, pp. 1301-1308.
Contour Based Representation of the Displacement Field for Motion Compensated Image Coding, Stefan Carlsson and Christian Reillo, IEEE, pp. 161-164.
"Industrial Vision Systems Based on Application-Specific IC Chips" IEICE Transactions, Ichiro Masaki, pp. 1728-1734.
"Algorithms and VLSI Architectures for Motion Estimation" VLSI Implementations for Image Communications 1993, pp. 251-282.
"A Binary Block Matching Architecture with Reduced Power Consumption and Silicon Area Requirement" Marcelo M. Mizuki, Ichiro Masaki, Anantha Chandrakasan, Berthold Horn, Charlie Sodini, 9 pages.
"Computing 3-D Motion in Custom Analog and Digital VLSI" Lisa Dron, MIT Artificial Intelligence Laboratory, Technical Report 1498, Aug. 1994, pp. 1-309.
Chandrakasan Anantha
Horn Berthold
Masaki Ichiro
Mizuki Marcelo M.
Daly Christopher S.
Mancuso Joseph
Massachusetts Institute of Technology
Patel Jayanti K.
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