Method and apparatus for monitoring memory addresses

Details Method and apparatus for monitoring memory addresses Method and apparatus for monitoring memory addresses

2011-07-05

2011-07-05

Le, Vu A (Department: 2824)

Static information storage and retrieval

Addressing

Particular decoder or driver circuit

C365S230080

Reexamination Certificate

active

07974147

ABSTRACT:
Disclosed herein is a method and apparatus for monitoring a memory address transmitted along an address path and converted into a row or column address of memory. The method includes: generating a path decision signal for deciding whether to connect the address path to a data terminal of the memory according to a memory command; and when the address path is connected to the data terminal of the memory in response to the path decision signal, transmitting a memory address, corresponding to the memory command, to the data terminal of the memory so that the memory address is monitored through the data terminal of the memory.

REFERENCES:
patent: 5784291 (1998-07-01), Chen et al.
patent: 6119254 (2000-09-01), Assouad et al.
CMOS SDRAM Device Operation, Samsung, Jul. 2006.
CMOS SDRAM Timing Diagram, Samsung, Feb. 2004.

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