Method and apparatus for monitoring frequency synthesizer lockin

Pulse or digital communications – Repeaters – Including pulse regeneration or conversion

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Details

4551921, 455265, 331 1R, H04L 2564, H04B 118, H04B 106, H03L 700

Patent

active

059828129

ABSTRACT:
A frequency synthesizer circuit comprises a controller, a synthesizer and a voltage controlled oscillator are used to generate an oscillating signal in response to external commands. The synthesizer provides a lock detect signal to the controller when the synthesizer detects that the oscillating signal has reached a desired frequency following application of a load signal. A first timer, a second timer, and a counter are adapted to receive the load signal and the lock detect signal. The first timer provides a first measurement corresponding to an amount of time between the load signal and a first receipt of the lock detect signal. The second timer provides a second measurement corresponding to an amount of time between the load signal and a final receipt of the lock detect signal. The counter provides a count value corresponding to a total number of times that the lock detect signal is received inclusive of the first receipt and the final receipt of the lock detect signal. A memory device is coupled to each of the first timer, second timer, and counter, which has a data storage portion for storing the first measurement, second measurement and count value.

REFERENCES:
patent: 4409688 (1983-10-01), Baker
patent: 5471661 (1995-11-01), Atkinson
patent: 5686864 (1997-11-01), Martin et al.

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