Boots – shoes – and leggings
Patent
1996-07-23
1998-05-26
Teska, Kevin J.
Boots, shoes, and leggings
364490, G06F 1750
Patent
active
057576793
ABSTRACT:
A drain-source interconnection of a MOS transistor is represented by a parallel circuit formed of an electric current source and a resistor. The current of the electric current source, i, is represented by a polynomial of a difference (V.sub.GS -V.sub.T) where V.sub.GS is the gate-source voltage and V.sub.T is the threshold voltage. The operation area of the MOS transistor is divided into a plurality of sub-operation areas according to the gate-source and drain-source voltages. Respective coefficients of the polynomial and respective conductance of the resistor element are stored for the sub-operation areas. A MOS transistor model is prepared so that V.sub.T is represented by a polynomial of V.sub.BS, the substrate-source voltage of the MOS transistor. A circuit equation for a MOS transistor-containing semiconductor circuit is derived from the MOS transistor model. The circuit equation is analyzed.
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Akino Toshiro
Sawai Toshitsugu
Frejd Russell W.
Matsushita Electric - Industrial Co., Ltd.
Teska Kevin J.
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