Computer-aided design and analysis of circuits and semiconductor – Design of semiconductor mask or reticle – Analysis and verification
Reexamination Certificate
2011-06-21
2011-06-21
Garbowski, Leigh Marie (Department: 2825)
Computer-aided design and analysis of circuits and semiconductor
Design of semiconductor mask or reticle
Analysis and verification
C716S136000
Reexamination Certificate
active
07966582
ABSTRACT:
One embodiment of the present invention provides techniques and systems for modeling long-range extreme ultraviolet lithography (EUVL) flare. During operation, the system may receive an evaluation point in a layout. Next, the system may receive an EUVL model which includes kernels that are discretized at different sampling rates, and which have different sized ambits. Specifically, a kernel that is discretized using a low sampling rate may have a longer range than a kernel that is discretized using a high sampling rate. The system may then convolve the kernels with the layout at the evaluation point over their respective ambits. Next, the system may use the convolution results to determine an indicator value. The indicator value can be used for a number of applications, e.g., to predict pattern shapes that are expected to print on a wafer, to perform optical proximity correction, or to identify manufacturing problem areas in the layout.
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Melvin, III Lawrence S.
Taravade Kunal N.
Ward Brian S.
Garbowski Leigh Marie
Park Vaughan Fleming & Dowler LLP
Sahasrabuddhe Laxman
Synopsys Inc.
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