Miscellaneous active electrical nonlinear devices – circuits – and – Specific signal discriminating without subsequent control – By amplitude
Reexamination Certificate
2000-09-27
2001-12-04
Wells, Kenneth B. (Department: 2816)
Miscellaneous active electrical nonlinear devices, circuits, and
Specific signal discriminating without subsequent control
By amplitude
C327S079000, C327S552000
Reexamination Certificate
active
06326816
ABSTRACT:
BACKGROUND OF THE INVENTION
This application incorporates by reference Taiwanese application Serial No. 88121612, filed on Dec. 9, 1999.
1. Field of the Invention
The invention relates in general to circuitry for minimal phase delay and zero crossing filtering and more particularly to circuitry for minimal phase delay and zero crossing filtering, which is used for high-speed glitch-free analog-to-digital signal conversion.
2. Description of the Related Art
Zero-crossing (ZC) filters are widely applied in circuit designs, such as the circuitry design for converting analog to digital signals.
Referring now to
FIG. 1
, it illustrates a conventional zero crossing filter having two inputs, an input signal V
I
and a reference voltage V
ref
, and outputting an output signal V
O
′.
FIG. 2
depicts the transfer characteristic of the zero crossing filter in FIG.
1
.
FIG. 2
indicates that when V
I
becomes lower than V
ref
, V
O
′ changes from the high level state L
1
to the low level state L
0
; otherwise, when V
I
becomes higher than V
ref
, V
O
′ changes from the low level state L
0
to the high level state L
1
.
FIG. 3
contains the waveform diagrams of the input and output signals of the filter in FIG.
1
. In the case of V
ref
of 0 voltage, the ideal output signal waveform of the filter is the signal V
O
. In
FIG. 3
, there are four zero crossing points indicated by the intersections of the vertical dotted lines and the time axes. However, the input signal V
I
may be interfered with by some external high frequency noise, resulting in undesired glitches near the zero crossing points in the output signal waveform, such as the waveform of the output signal V
O
′ shown in FIG.
3
. The glitches negatively affect the quality of the output signal V
O
, which will easily cause the circuitry for processing the output V
O
′ to operate improperly.
For eliminating glitches, there are two conventional approaches. In the first approach a hysteresis zero crossing filter is applied. Referring now to
FIG. 4
, it illustrates a hysteresis zero crossing filter having two input signals, V
I
and V
ref
, and an output signal V
O
.
FIG. 5
depicts the transfer characteristic of the hysteresis zero crossing filter in FIG.
4
. According to
FIG. 5
, when V
I
exceeds the high threshold voltage V
H
, output signal V
O
changes from the low level state L
0
to the high level state L
1
; on the other hand, when V
I
becomes below the low threshold voltage V
L
, V
O
changes from the high level state L
1
to the low level state L
0
.
Referring to
FIG. 6
, it contains the waveform diagrams of the input and output signals of the hysteresis zero crossing filter. Because of the hysteresis of the filter, the output signal V
O
does not contain any glitch. However, due to the hysteresis, a phase delay of the output signal V
O
occurs.
Another approach to diminishing glitches is to cascade the zero crossing filter, in which glitches occur, with a digital logic circuitry for processing the output signal of the filter. The digital circuitry detects whether a glitch occurs on the output signal of the filter. If so, the circuitry temporarily stops sampling the output signal of the filter for a period of time, i.e. a response time delay, until the input signal V
I
is stable. Although, in this approach, glitches are reduced effectively, a phase delay of the output signal V
O
occurs also.
In systems having high-speed analog-to-digital signal conversion, phase delay in signals may affect the total performance of the systems. For instance, in a digital versatile disk (DVD) system, a servo control signal is used to control the actuator of the optical head for tracking and focusing. If the servo control signal has a phase delay, the response speed of the servo controller becomes slower such that the system fails to maintain the effective performance.
SUMMARY OF THE INVENTION
It is therefore an object of the invention to provide an apparatus and a method for minimal phase delay and zero crossing filtering. The filtering apparatus utilizes the characteristics of a phase delay filter, a hysteresis zero crossing filter and a phase protecting filter for obtaining an output signal with minimal phase delay and no glitch. The invention is suitable for systems that require no phase delay and glitch in the output of analog-to-digital signal conversion.
In accordance with the object of the invention, it provides an apparatus for minimal phase delay and zero crossing filtering, receiving both an input signal and a reference signal while outputting a filtered signal. The apparatus includes a zero crossing filter, a hysteresis zero crossing filter, and a phase-protect filter. The zero crossing filter generates a zero-delay signal in response to the input signal and the reference signal. The hysteresis zero crossing filter generates a hysteresis signal in response to the input signal and the reference signal. The phase-protect filter generates the filtered signal in response to the zero-delay signal and the hysteresis signal. The zero-delay signal, the hysteresis signal, and the filtered signal are switched between a first state and a second state. When the zero-delay signal has a change of state and the hysteresis signal is at the first state, the filtered signal is at the second state. When the zero-delay signal has a change of state and the hysteresis signal is at the second state, the filtered signal is at the first state. When the zero-delay signal has no change of state, the filtered signal remains unchanged.
In accordance with the object of the invention, it also provides a phase protect filter for receiving a zero-delay signal and a hysteresis signal and outputting a filtered signal. The phase protect filter includes a first register, an exclusive-OR circuit, a NAND circuit, multiplexer, and second register. The first register receives the zero-delay signal and a system clock signal and outputs a first signal. The exclusive-OR circuit receives the zero-delay signal and the first signal and outputs a second signal. The NAND circuit receives the hysteresis signal and the second signal and outputs a third signal. The multiplexer receives the second signal and the third signal and outputs a fourth signal. The second register receives the system clock signal and the fourth signal and outputs the filtered signal. The filtered signal is fed back to the multiplexer and the multiplexer selects either the filtered signal or the third signal as the fourth signal according to the second signal.
In accordance with the object of the invention, it also provides a method for minimal phase delay and zero crossing filtering, converting an input signal into a filtered signal. First, a zero-delay signal and a hysteresis signal are generated, wherein the zero-delay signal, hysteresis signal, and filtered signal are switched between a first state and a second state. The filtered signal is then outputted according to the zero-delay signal and the hysteresis signal. When the zero-delay signal has a change of state and the hysteresis signal is at the first state, the filtered signal is at the second state. When the zero-delay signal has a change of state and the hysteresis signal is at the second state, the filtered signal is at the first state. When the zero-delay signal has no change of state, the filtered signal's state remains unchanged.
REFERENCES:
patent: 4912420 (1990-03-01), Parnell
patent: 6259296 (2001-07-01), Hatani
Dinh Paul
Rabin & Berdo P.C.
VIA Technologies Inc.
Wells Kenneth B.
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