Method and apparatus for memory overlay

Details Method and apparatus for memory overlay Method and apparatus for memory overlay

1983-09-19

1986-02-04

Fleming, Michael R.

Excavating

364200, G06F 916, G06F 1100

Patent

active

045690480

ABSTRACT:
A microprocessor-based system (10) is tested by a testing device (32) that substitutes instructions from a substitute memory (38) for those in the main memory (28) of the system (10) under test. When the processor (12) of the system under test attempts to read a location in its memory (28), it places signals on bus address lines (22) to designate the memory location and places a data-direction signal on a control line (50) to indicate that the memory (28) is to transmit rather than receive information. In ordinary operation, the memory then places its data on bus data lines (24). In order to replace the data from the main memory (28) with data from the substitute memory (38), the testing device (32) senses whether the address lines (22) carry the address of a memory location whose contents are to be substituted. When such an address is detected, it overdrives the control line (50) to cause it to indicate a write rather than a read. This prevents the main memory (28) from placing its data on the data lines (24). Instead, the test device (32) causes its substitute memory (38) to place its contents on the data lines (24). Since there is no contention between the substitute memory (38) and the main memory (28), the contents of the substitute memory (38) can be placed on the data lines (24) without overdriving them.

REFERENCES:
patent: 3911402 (1975-10-01), McLean et al.
patent: 3978455 (1976-08-01), Valassis et al.
patent: 4122519 (1978-10-01), Bizlawski et al.
patent: 4422144 (1983-12-01), Johnston et al.
patent: 4439828 (1984-03-01), Martin

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