Method and apparatus for measuring trigger and latchback voltage

Electricity: measuring and testing – Fault detecting in electric circuits and of electric components – Of individual circuit component or element

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Details

324158D, 324158T, 324719, 324652, G01R 3102

Patent

active

050577808

ABSTRACT:
Disclosed is a measurement method and apparatus by which measurement of the breakdown voltage of a semiconductor device under test (DUT) may be conducted with an inexpensive measuring system in which thermal stress applied to the DUT is small and thus measurement error caused by characteristic change of the DUT is less. A constant current smaller than the breakdown current of the DUT is applied to a DUT using a constant current source, and waveforms between terminals of said DUT are observed by a waveform observation device, thereby measuring the trigger voltage and the latchback voltage. When a constant current I is applied to the DUT from the constant current source, a stray capacitance C between terminals of said DUT is charged. Thus, the voltage between terminals of said DUT is increased with a constant inclination (I/C) as time goes by.

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