Dynamic magnetic information storage or retrieval – Monitoring or testing the progress of recording
Reexamination Certificate
2000-07-12
2003-10-14
Holder, Regina N. (Department: 2651)
Dynamic magnetic information storage or retrieval
Monitoring or testing the progress of recording
C360S046000, C360S067000
Reexamination Certificate
active
06633441
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
This invention generally relates to a transducer measuring arrangement and more particularly to CMOS circuit arrangements for measuring voltage from a magnetic transducer element.
2. Description of the Related Art
In currently used electronic apparatus, it is often necessary to measure the output signal from a transducer to assure proper operation. Generally, transducers used in personal computers or similarly designed equipment only provide a very low output signal which makes accurate measurement of transducer output difficult and expensive. Accordingly, some type of amplification is needed to substantial improvement in measurement accuracy.
FIG. 1
shows a functional block diagram of a known arrangement for amplifying the output of a device such as a magneto-resistive head of a hard disk unit in processing equipment to provide accurate head output voltage measurement. In
FIG. 1
, a current source
101
provides a current bias to a magneto-resistive head
103
and a voltage source
105
connects the head
103
to an appropriate reference voltage such as ground. The inputs of a voltage buffer
107
for amplification are coupled to the head
103
and the amplified head signal appears at an output
110
. Using amplification, the measurements may be performed without excessive loading of the head
103
at a voltage level suitable for accurate measurement.
FIG. 2
shows a block diagram of a circuit useful as the voltage buffer
107
in FIG.
1
. Referring to
FIG. 2
, one lead from the magneto-resistive head
103
is connected to an input
210
of an operational amplifier
207
and the other lead of the magneto-resistive head
103
is connected to a ground reference. A resistor
201
having a value R has one lead therefrom connected to the other input
213
of the operational amplifier
207
and another lead connected to the ground reference. A feedback resistor
205
having a value
4
R is connected between an output
220
of the amplifier
207
and the amplifier input
213
. As is well known, the voltage at input
210
substantially appears entirely across the resistor
201
and the current I through resistor
201
is
I=V
201
/R
The same current I flows through feedback resistor
205
and the voltage at the output
220
is
V
220
=I
(
R
+4
R
)=I*5
R
so that the voltage at the output
220
is 5V
201
. Accordingly, the operational amplifier
207
provides a voltage gain of 5 and the output voltage of the magneto-resistive head
103
which may be on the order of 200 mv is increased to a voltage in the one volt range to improve the accuracy of the measurement of the head voltage.
FIG. 3
is a detailed diagram of an exemplary prior art CMOS amplifier circuit that may be used as the operational amplifier
207
of FIG.
2
. Referring to
FIG. 3
, there is shown a differential amplifier having inputs
380
and
382
which inputs are applied to the gates of N type CMOS transistors MN
301
and MN
302
. The sources of the NMOS transistors MN
301
and MN
302
are connected to a current source formed by the serial drain-source paths of NMOS transistors MN
305
and MN
307
. The gate of the NMOS transistor MN
305
is provided with a bias voltage from a voltage supply line
366
. The gate of the NMOS transistor MN
307
is provided with bias voltage from a voltage supply line
368
and has its source connected to a ground reference line
369
.
The arrangement of PMOS transistors MP
309
and MP
311
and NMOS transistors MN
320
and MN
322
connected between positive supply line
360
and ground reference line
369
is coupled to the drain of NMOS transistor MN
301
between the drain of PMOS transistor
309
and the source of PMOS transistor MP
311
. NMOS transistors MN
320
and MN
322
form a cascoded current bias arrangement for the cascoded PMOS transistors MP
309
and MP
311
. Similarly, the arrangement of PMOS transistors MP
313
and MP
315
and NMOS transistors MN
324
and MN
326
connected between positive supply line
360
and ground reference line
369
is coupled to the drain of NMOS transistor MN
302
between the drain of PMOS transistor
313
and the source of PMOS transistor MP
315
. NMOS transistors MN
324
and MN
326
form a cascoded current bias arrangement for the cascoded PMOS transistors MP
313
and MP
315
. A bias supply line
362
supplies a bias to the gates of the PMOS transistors MP
309
and MP
313
and a bias supply line
369
supplies a bias to the cascoded PMOS transistors MP
311
and MP
315
. The gates of NMOS type cascoded transistors MN
320
and MN
324
receive a bias voltage from the supply line
366
and the gates of NMOS bias current transistors MN
322
and MN
326
receive a bias voltage from the supply line
368
.
Cascoded P type transistors MP
309
and MP
311
couple the output obtained from the NMOS transistor MN
301
to the gate of a PMOS transistor MP
342
which has its source connected to positive supply line
360
and its drain connected to cascoded NMOS transistors MN
328
and MN
330
. NMOS transistors MN
328
and MN
330
connected between the drain of the PMOS transistor MP
342
and the ground reference line
369
form a current source for the PMOS transistor MP
342
. A single ended output is provided by PMOS transistor MP
342
at terminal
350
. Similarly, cascoded PMOS transistors MP
313
and MP
315
couple the output obtained from the NMOS transistor MN
302
to the base of a PMOS transistor MP
340
which has its source connected to positive supply line
360
and its drain connected to cascoded NMOS transistors MN
332
and MN
334
. NMOS transistors MN
332
and MN
334
connected between the drain of the PMOS transistor MP
340
and the ground reference line
369
form a current source for the PMOS transistor MP
340
. A single ended output is provided by PMOS transistor MP
340
at terminal
352
.
The use of a CMOS operational amplifier circuit such as shown in
FIG. 3
provides the advantages of compatibility with integrated circuit arrangements used in present electronic apparatus and minimum power consumption. There remains a problem, however, in that the input to the operational amplifier from the transducer must be referenced to the same fixed reference potential point as the output of the amplifier. In
FIG. 2
, the transducer
103
connected to the voltage buffer
207
and the output of the voltage buffer must both be referenced to the same ground potential point. Accordingly, restrictions are imposed on the ground connections of components on the input side of the voltage buffer which severely limit the operational arrangements of the transducer. With respect to a magneto-resistive head, the normal operation of the head in a fixed disk unit requires that the head be isolated from a fixed ground potential.
SUMMARY OF THE INVENTION
The invention is directed to a transducer measuring circuit in which an output provided by the transducer is amplified for measurement. In accordance with the invention, the transducer output is a voltage that is coupled to a differential input of a converter in which the coupled voltage is converted to a current. The output current of the converter is applied to a voltage former referenced to a fixed potential and the output voltage of the voltage former is measured.
According to one aspect of the invention the converter is an operational amplifier with a differential input and a single ended output returned to the fixed potential which provides amplification for measurement. The transducer output is coupled to a differential input of the operational amplifier through a coupling arrangement isolated from the fixed potential to which the single ended amplifier output is returned. The operational amplifier output is converted to a current signal that is fed back to the differential input.
According to another aspect of the invention, the converted current signal from the operational amplifier output is fed back to the differential input through a current mirror.
According to yet another aspect of the invention, the differential input of the o
Cheng Yi
Lam Steven C.
Holder Regina N.
Marvell International Ltd.
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