Data processing: measuring – calibrating – or testing – Measurement system in a specific environment – Electrical signal parameter measurement system
Patent
1996-01-26
1998-08-18
Chin, Gary
Data processing: measuring, calibrating, or testing
Measurement system in a specific environment
Electrical signal parameter measurement system
324525, 324719, 324724, G01R 3126
Patent
active
057971145
DESCRIPTION:
BRIEF SUMMARY
BACKGROUND OF THE INVENTION
The invention relates to developing maps of semiconductor materials. The maps can be used to detect inhomogeneities.
For semiconductors, resistivity inhomogeneities can arise due to non-uniformities in charge carrier concentrations or chemical and physical impurities. Also, inhomogeneities can arise due to local changes in thickness of materials. (For simplicity, such changes which give rise effectively to resistance variations will be referred to also hereinafter as resistivity variations.) Such non-uniformities arise as a consequence of growth processes for forming and/or subsequent heat treatments of semiconductor materials. Semiconductor materials in this context comprise amongst other things elemental (e.g., silicon, germanium, diamond), allow/compound (e.g., gallium arsenide, cadmium mercury telluride), and semi-insulating materials such as SI gallium arsenide.
Conventionally resistivity maps have been drawn up using a 4-point probe. (See for example, U.S. Pat. No. 4,204,155). The four points of the probe are typically in line or in a square configuration. Current is injected into the semiconductor body using two of the four points of the probe and the resulting potential is measured across the other two points of the probe. This method is slow in that the probe must repositioned for each measurement taken. It also requires a large number of measurements to be taken to build up an overall picture of the resistivity of the semiconductor body. In addition the response of a semiconductor body such as a wafer to an injected current will vary between its edge and say its centre. Compensations for these variations must therefore be made to measured potentials resulting from current flow in the wafer, further complicating the procedure. This method is also destructive as the probe contacts all parts of the wafer.
U.S. Pat. No. 4,857,839 discloses a technique for generating a database of information including resistivity values for an array of individual portions of a semiconductor wafer; a resistivity map can be produced from this database. Each such resistivity value is calculated from values of a current applied to the respective portion and of a directly measured voltage across the portion. The portion under examination is illuminated by a light pixel, and conductive paths to the illuminated portion from appropriate contact points at the wafer perimeter are formed in the wafer itself by illumination with light transmitted through a light mask.
Other techniques sometimes employed for resistance mapping of semiconductors include induced currents (eddy currents) or microwave methods. Probes adapted to generated currents in this fashion need to be calibrated with reference to a uniform body of known resistivity in order for absolute values of resistance to be obtained. Also, when currents are induced the materials under test need, in practice, to be obtained. Also, when currents are induced the materials under test need, in practice, to be highly conductive. This limits the range of material resistivities than can be sensibly measured. Again a point-by-point picture of a wafer can only be drawn up by moving the probe or wafer from location to location.
In accordance with one aspect of the invention there is provided a method of mapping the resistivity of a semiconductor body by placing a plurality of surface probes at spaced intervals on or near the semiconductor body, causing currents to flow in the semiconductor body, and measuring the resulting potential created between pairs of the surface probes, generating data representing the correspondence between the measured potentials and potentials determined assuming the semiconductor body has a predetermined configuration, and mapping the resistivity of the semiconductor body using the generated data.
The step of mapping the resistivity may comprise comparing the generated data with data representing at least one semiconductor body having a known resistivity pattern.
The assumed semiconductor body having a predetermined configurati
REFERENCES:
patent: 4617939 (1986-10-01), Brown et al.
patent: 4703252 (1987-10-01), Perloff et al.
patent: 4755746 (1988-07-01), Mallory et al.
patent: 4857839 (1989-08-01), Look et al.
patent: 5448503 (1995-09-01), Morris et al.
Soviet Inventions Illustrated, El section, week 8520, Jun. 26, 1985, Derwent Publications, Ltd., London & SU,A,1064 805.
Blight Stephen Richard
Djamdjl Francois Jean
Freeston Ian Leslie
Gorvin Anthony Charles
Mayes Ian Christopher
Bio-Rad Microscience Limited
Chin Gary
Pipala Edward
The University of Sheffield
LandOfFree
Method and apparatus for mapping of semiconductor materials does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Method and apparatus for mapping of semiconductor materials, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Method and apparatus for mapping of semiconductor materials will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-1126355