Method and apparatus for mapping memory as to operable and fault

Details Method and apparatus for mapping memory as to operable and fault Method and apparatus for mapping memory as to operable and fault

1994-03-11

1996-07-30

Gordon, Paul P.

Excavating

39518204, 371 216, G06F 1100

Patent

active

055419380

ABSTRACT:
System for enabling the use of semiconductor dynamic memories having faulty locations therein where the memory is organized in banks for forming an elementary information word. The system identifies all homologous address locations which are not faulty, and the non-faulty locations are then stored as a map in a non-volatile read-only-memory related to the memory bank so as to form a transcoding table. Access to the memory blocks involves the use of a central processing unit requesting access to a block identified by a sequential address. The system then provides for associating the material address of a block of the memory array to the logical address, this association or transcoding operation being carried out by the non-volatile read-only-memory.

REFERENCES:
patent: 4653050 (1987-03-01), Vaillancourt
patent: 4939694 (1990-07-01), Eaton et al.
patent: 5067105 (1991-11-01), Borkenhagen et al.
patent: 5077737 (1991-12-01), Leger et al.

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