Electrical computers and digital processing systems: processing – Processing architecture – Array processor
Reexamination Certificate
2008-09-23
2008-09-23
Coleman, Eric (Department: 2183)
Electrical computers and digital processing systems: processing
Processing architecture
Array processor
C712S005000
Reexamination Certificate
active
10996269
ABSTRACT:
A single instruction multiple data processing device includes a plurality of processing elements. Each processing element includes an execute mask count register storing a plurality of bits. The writing updated data to registers in each processing element is enabled and disabled in dependence on the multi bit data stored in the execute mask count register.
REFERENCES:
patent: 5604913 (1997-02-01), Koyanagi et al.
patent: 6167501 (2000-12-01), Barry et al.
patent: 2348981 (2000-10-01), None
patent: 11-296498 (1999-10-01), None
patent: WO 02/46885 (2002-06-01), None
United Kingdom Patent Office Search Report dated Jun. 18, 2004 (4 pages).
Levinthal, Adam and Porter, Thomas, Chap—A SIMD Graphics Processor, Jul. 1984, Computer Graphics, vol. 18, No. 3, pp. 77-82.
Coleman Eric
Flynn ,Thiel, Boutell & Tanis, P.C.
Imagination Technologies Limited
LandOfFree
Method and apparatus for management of control flow in a... does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Method and apparatus for management of control flow in a..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Method and apparatus for management of control flow in a... will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-3934019