Method and apparatus for low power clock generation for high spe

Details Method and apparatus for low power clock generation for high spe Method and apparatus for low power clock generation for high spe

1993-06-22

1994-11-15

Callahan, Timothy P.

Miscellaneous active electrical nonlinear devices, circuits, and

Signal converting, shaping, or generating

Frequency or repetition rate conversion or control

327237, 327291, H03B 1900

Patent

active

053651820

ABSTRACT:
A method and apparatus for low power clock generation for high speed applications includes a divider for receiving a high frequency input signal and producing a low frequency input signal controlled to a high resolution. A numerically controlled oscillator (NCO) is coupled to the divider and receives a frequency word and the input signal and produces a phase advance command. The phase advance command is used to produce an output transition command. The output transition command is executed in a phase shifter in response to a phase advance/retard polarity input and a high frequency clock input signal. The phase shifter produces a low-frequency output clock signal.

REFERENCES:
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patent: 4914397 (1990-04-01), Gale et al.
patent: 4984186 (1991-01-01), Moeder
patent: 5005141 (1991-04-01), Sanada et al.
patent: 5153526 (1992-10-01), Hori et al.
patent: 5155380 (1992-10-01), Hwang et al.
patent: 5179348 (1993-01-01), Thompson

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