Miscellaneous active electrical nonlinear devices – circuits – and – Specific signal discriminating without subsequent control – By presence or absence pulse detection
Reexamination Certificate
2005-09-23
2009-11-24
Tan, Vibol (Department: 2819)
Miscellaneous active electrical nonlinear devices, circuits, and
Specific signal discriminating without subsequent control
By presence or absence pulse detection
C327S145000, C326S040000, C326S046000, C326S098000
Reexamination Certificate
active
07622961
ABSTRACT:
Two latches store the state of a data signal at a transition of a clock signal. Comparison logic compares the outputs of the two latches and produces a signal to indicate whether the outputs are equal or unequal. Systems using the latches and comparison logic are described and claimed.
REFERENCES:
patent: 4535459 (1985-08-01), Hogge, Jr.
patent: 5223755 (1993-06-01), Richley
patent: 5301196 (1994-04-01), Ewen et al.
patent: 5317219 (1994-05-01), Lupi et al.
patent: 5398262 (1995-03-01), Ahuja
patent: 5579352 (1996-11-01), Llewellyn
patent: 5917356 (1999-06-01), Casal et al.
patent: 6058152 (2000-05-01), Tanishima
patent: 6100732 (2000-08-01), Penry et al.
patent: 6121804 (2000-09-01), Bryan et al.
patent: 6225831 (2001-05-01), Dalmia et al.
patent: 6259274 (2001-07-01), Endou et al.
patent: 6545508 (2003-04-01), Senba
patent: 7088796 (2006-08-01), Djahanshahi et al.
patent: 7092474 (2006-08-01), Cao
patent: 7190906 (2007-03-01), Cao
patent: 2001/0030566 (2001-10-01), Sahu
patent: 2001/0033407 (2001-10-01), Cao
patent: 2004/0078661 (2004-04-01), Nakano et al.
patent: 09 200491 (1997-07-01), None
patent: 2005 214732 (2005-08-01), None
International Application PCT/US2006/036153 PCT Search Report & Written Opinion dated Mar. 29, 2007.
PCT International Preliminary Report on Patentability, PCT/US2006/036153 issued Mar. 26, 2008 (1 page).
PCT Written Opinion PCT/US2006/036153 issued Mar. 26, 2008 (5 pages).
UHT: Going Beyond Worst-Case Specs with TEAtime, IEEE Computer Society, Mar. 2004, pp. 51-56.
Thomas Knight et al., “A Method for Skew-free Distribution of Digital Signals Using Matched Variable Delay Lines”, Artificial Intelligence Laboratory and Dept. of Electircal Engineerign and Computer Science, Mass. Institute of Technology, A.I. Memo No. 1282, Mar. 1992, pp. 1-13.
Knight, C.G., et al. “An IDDQ Sensor for Concurrent Timing Error Detection”, IEEE, 1997, pp. 281-289.
Ernst, D., et al., “Razor: A Low-Power Pipeline Based on Circuit-Level Timing Speculation”, Proc. of 36th Int'l Symp. on Microarchitecure, IEEE, 2003, 12 pp.
Uht, A.K., “Going Beyond Worst-Case Specs with TEAtime”, IEEE Computer Society, Mar. 2004, pp. 51-56.
Annavaram Murali
Grochowski Edward
Lu Shih-Lien L.
Wilkerson Chris
Blakely , Sokoloff, Taylor & Zafman LLP
Crawford Jason
Intel Corporation
Tan Vibol
LandOfFree
Method and apparatus for late timing transition detection does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Method and apparatus for late timing transition detection, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Method and apparatus for late timing transition detection will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-4107119