Electrical computers: arithmetic processing and calculating – Electrical digital calculating computer – Particular function performed
Reexamination Certificate
2006-04-11
2006-04-11
Mai, Tan V. (Department: 2193)
Electrical computers: arithmetic processing and calculating
Electrical digital calculating computer
Particular function performed
Reexamination Certificate
active
07028060
ABSTRACT:
A method, apparatus, and a computer program product for generating a set of jointly optimized linear signal processing filters and subband filters for processing digital data on a computer system are presented. In general, the invention performs the operations of determining a design scheme for at least one linear signal processing filter; determining a design scheme for at least one subband filter; and relating the design schemes for the at least one linear signal processing filter and the at least one subband filter in order to determine a relationship therebetween. The relationship provides criteria for optimization (e.g. maximizing data compression while minimizing processing requirements). Next, the design schemes are jointly adjusted using the relationship to optimize the criteria for optimization and generates an optimized linear signal processing filter/subband filter set to provide improved data processing performance.
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Wah B., W., et al., “Discrete Lagrangian methods for optimizing the design of multiplierless QMF banks,” IEEE Transactions on Circuits and Systems II: Analog and Digital Signal Processing, Sep. 1999, vol. 46, No. 9, pp. 1179-1191, XP002210914.
Wah B., W., et al., “QMF filter bank design by a new global optimization method,” Acoustics, Speech, and Signal Processing, 1997. ICASSP-97, IEEE Int. Conference in Munich, Germany Apr. 21-24, 1997, Los Alamos, CA, USA, IEEE Comput. Soc. pp. 2081-2084, XP010226345.
HRL Laboratories LLC
Mai Tan V.
Tope-McKay & Associates
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