Active solid-state devices (e.g. – transistors – solid-state diode – Integrated circuit structure with electrically isolated... – Including means for establishing a depletion region...
Reexamination Certificate
2001-06-29
2003-10-14
Flynn, Nathan J. (Department: 2826)
Active solid-state devices (e.g., transistors, solid-state diode
Integrated circuit structure with electrically isolated...
Including means for establishing a depletion region...
C257S500000, C438S218000, C438S219000, C438S353000
Reexamination Certificate
active
06633073
ABSTRACT:
BACKGROUND OF THE INVENTION
The present invention relates generally to circuits and more specifically to techniques for isolating sensitive circuits from noise using deep substrate n-well.
In today's circuits, it is becoming increasingly more common for circuits of diverse functionality to be fabricated on a single integrated circuit (i.e., chip). A mixed-signal integrated circuit includes both analog and digital circuits to respectively perform analog and digital processing on signals. Analog circuits are typically more sensitive to noise than digital circuits. This is due to the fact that analog circuits are typically operated in the linear region, whereas digital circuits often transition between two operating points outside the linear region.
The signals operated on by analog circuits may be in the milli-volts range, and a small amount of noise can distort or destroy these signals. In comparison, digital circuits typically operate on signals at two fixed voltages, e.g., ground and a supply voltage, V
DD
. In addition, digital circuits can cause a large amount of switching noise during operation. Therefore, it is a common practice to separate these two types of circuits on the integrated circuit to prevent noise generated by the digital circuits from coupling onto the analog circuits.
As circuits migrate to lower power supply voltages (e.g., 5.0V, 3.3V, 2.0V, 1.5V, and lower), they become more susceptible to noise. The lower supply voltages result in smaller signal amplitude, which in turn decreases the noise margins of the circuits. In this environment, even a small amount of noise may be enough to cause a circuit to function erroneously.
To reduce cost, it is desirable to integrate multiple types of circuits into a single mixed-signal chip. This results in integrating circuits of diverse functionality onto the same die. Since die area is typically quite expensive, these different types of circuits are often packed as close together as possible to maximize die usage. As a result of circuits being placed close to each other, the noise generated by the (e.g., digital) circuits can more easily couple to and degrade the performance of the neighboring (e.g., analog) circuits.
There is therefore a need in the art for techniques to provide isolation for sensitive circuits from noise generated by other circuits on the same chip.
SUMMARY OF THE INVENTION
The invention provides techniques to isolate noise-sensitive circuits from noise generated by nearby circuits. In one design, a quiet region is formed on a die when surrounded by a deep n-well formed on top of a p-type substrate. The deep n-well is heavily doped n-type and forms a depletion region at the junction with the p-type substrate. The depth and width of the depletion region is dependent on the doping concentration of the deep n-well and the amount of reverse bias voltage applied to the deep n-well. In general, a wider and deeper depletion region may be formed by (1) more heavily doping the deep n-well and (2) applying a higher reverse bias voltage to the deep n-well. However, heavier doping of the deep n-well also results in a lower breakdown voltage, which then limits the magnitude of the reverse bias voltage that may be applied. By properly constructing the deep n-well and applying a high reverse bias voltage, a deep and wide depletion region may be formed to provide a barrier against noise from entering the quiet region.
In one aspect, the deep n-well may be heavily doped with n-type using various techniques. In one technique, high-energy ion implantation may be used to dope the deep n-well. With this technique, the doping concentration for the deep n-well is generally greater toward the junction between the deep n-well and the p-type substrate, which then allows a wider and deeper depletion region to be formed for a given reverse bias voltage. However, the breakdown voltage is also lower for the heavier doping concentration. In another technique, low-energy ion implantation may be used to dope the deep n-well. With this technique, ions are implanted on the surface of the deep n-well and driven into the well via heat.
In another aspect, a voltage pump is used to provide a reverse bias voltage for the p-n junction formed between the deep n-well and p-type substrate. The depletion region formed at the p-n junction may be controlled based on the reverse bias voltage applied to the deep n-well. By using the voltage pump, a reverse bias voltage greater than a supply voltage for the die may be generated and used to provide a wider and deeper depletion region, which then provides improved noise protection for the quiet region. The reverse bias voltage applied to the deep n-well is maintained to be less than the breakdown voltage for the p-n junction.
Various other aspects, embodiments, and features of the invention are also provided, as described in further detail below.
The foregoing, together with other aspects of this invention, will become more apparent when referring to the following specification, claims, and accompanying drawings.
REFERENCES:
patent: 6020614 (2000-02-01), Worley
patent: 6349067 (2002-02-01), Hsu et al.
Rezvani Ali
Sudjian Douglas
Flynn Nathan J.
RF Micro Devices, Inc.
Wilson Scott R
Withrow & Terranova , PLLC
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