Method and apparatus for interfacing memory devices operating at

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395281, 395290, 395306, 395308, 395309, 395310, 3642403, 3642405, G06F 1336, G06F 1342

Patent

active

057218820

ABSTRACT:
An apparatus which includes a state machine which tests the condition of the PCI bus, the condition of a target device on the bus, and then generates signal to accomplish the transfer which signals vary with the ability of the target device to transfer the data at particular rates.

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