Method and apparatus for interconnecting multiple circuit chips

Details Method and apparatus for interconnecting multiple circuit chips Method and apparatus for interconnecting multiple circuit chips

1998-03-16

2000-09-05

Neibling, John F.

Semiconductor device manufacturing: process

Bonding of plural semiconductor substrates

438457, 438456, 438458, 438459, 438689, 438107, 438108, 438109, 257686, 257773, 257785, H01L 2130

Patent

active

061142212

ABSTRACT:
A method for fabricating an interconnected multiple circuit chip structure by etching a first substrate to form protrusions on its surface. Then the protrusions are preferentially etched to produce a selected shape such as a tetragonal protrusion and an integrated circuit is then fabricated on the substrate. A second substrate is preferentially etched to form recesses having a selected shape that is the complement of the selected shape of the protrusions of the first substrate and then an integrated circuit is fabricated on the second substrate. The protrusions and recesses are coated with an electrically conductive metal such as aluminum. The first and second substrates are joined and aligned together such that the protrusions mate with the recesses and the structure is annealed such that the metal coatings thereon come into contact to electrically connect the integrated circuits on the substrates. The method can also be used to electrically connect multiple chips mounted back to front.

REFERENCES:
patent: 4975143 (1990-12-01), Drake et al.
patent: 4996587 (1991-02-01), Hinrichsmeyer et al.
patent: 5229647 (1993-07-01), Gnadinger
patent: 5356838 (1994-10-01), Kim
patent: 5454160 (1995-10-01), Nickel
patent: 5492223 (1996-02-01), Boardman et al.
patent: 5508563 (1996-04-01), Tazawa et al.
patent: 5525065 (1996-06-01), Sobhani
patent: 5532519 (1996-07-01), Bertin et al.
patent: 5556808 (1996-09-01), Williams et al.
patent: 5567653 (1996-10-01), Bertin et al.
patent: 5589083 (1996-12-01), Ahn et al.
patent: 5613033 (1997-03-01), Swamy et al.
patent: 5661901 (1997-09-01), King
patent: 5712190 (1998-01-01), Bertin et al.
patent: 5834324 (1998-11-01), Nakamoto
patent: 5872025 (1999-02-01), Cronin et al.

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