Electrical transmission or interconnection systems – Plural load circuit systems – Plural sources of supply
Reexamination Certificate
2002-11-19
2008-08-26
Sherry, Michael J (Department: 2836)
Electrical transmission or interconnection systems
Plural load circuit systems
Plural sources of supply
C713S330000
Reexamination Certificate
active
07417335
ABSTRACT:
A power booster circuit for use with an integrated circuit coupled to power supply circuitry. The integrated circuit includes a first circuit block that operates at a first voltage level and a second circuit block that operates at a second voltage level. The power supply circuitry includes a first regulator that receives a main supply voltage and provides a first supply voltage at the first level and a second regulator that receives the first supply voltage and provides a second supply voltage at the voltage level. The power booster circuit provides a temporary supply voltage at a third level to the second circuit block in response to the main supply voltage during a time interval between a first time at which the first supply voltage reaches the first level and a second time at which the second supply voltage reaches the second level upon power up of the integrated circuit.
REFERENCES:
patent: 4392084 (1983-07-01), Rebeschi et al.
patent: 4451742 (1984-05-01), Aswell
patent: 4879505 (1989-11-01), Barrow et al.
patent: 4954766 (1990-09-01), Ishikawa et al.
patent: 5075805 (1991-12-01), Peddle et al.
patent: 5532524 (1996-07-01), Townsley et al.
patent: 5552739 (1996-09-01), Keeth et al.
patent: 5563499 (1996-10-01), Pinney
patent: 5631547 (1997-05-01), Fujioka et al.
patent: 5675280 (1997-10-01), Nomura et al.
patent: 5808506 (1998-09-01), Tran
patent: 5825166 (1998-10-01), Tso et al.
patent: 6060942 (2000-05-01), Oh
patent: 6107786 (2000-08-01), Brown
patent: 6160430 (2000-12-01), Drapkin et al.
patent: 6362605 (2002-03-01), May
patent: 6595921 (2003-07-01), Urbano et al.
patent: 6614134 (2003-09-01), Davies
patent: 6965220 (2005-11-01), Kernahan et al.
patent: 2001/0020839 (2001-09-01), Rolandi et al.
patent: 2001/0048293 (2001-12-01), Pattamatta et al.
patent: 2005/0213268 (2005-09-01), Cetin et al.
Bhattarai Sam B.
Hussein Hakam D.
Cavallari Daniel
Seagate Technology LLC
Sherry Michael J
Westman Champlin & Kelly P.A.
LandOfFree
Method and apparatus for integrated circuit power up does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Method and apparatus for integrated circuit power up, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Method and apparatus for integrated circuit power up will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-4006546