Method and apparatus for inserting computer code into a high lev

Details Method and apparatus for inserting computer code into a high lev Method and apparatus for inserting computer code into a high lev

1995-09-29

1997-02-18

Lall, Parshotam S.

Boots, shoes, and leggings

395701, 39518313, 395704, 364578, G06F 1130, G06F 1750

Patent

active

056048955

ABSTRACT:
A method and apparatus, for determining test coverage estimation for an electrical circuit (10) formed in accordance with an original high level description (21), uses a central processing unit (CPU 18). The CPU (18) accesses the description (21) and parses the high level language description (21) to allow for the generation of new code. This new code is intermixed with code from the description (21) to form a new high level description (22) which not only can be used to simulate the electrical circuit but can collect test coverage information. A simulation of the description (22) is performed using test vector inputs to simulate operation of the circuit (10) and estimate it's test coverage for the test vectors. Various warning/error messages are derived to indicate where the test vectors are lacking in test coverage.

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